Method and apparatus for sequence determination, device and storage medium

ABSTRACT

The present disclosure provides a method and an apparatus for sequence determination, a device and a storage medium. The method for sequence determination includes: mapping a first bit sequence having a length of K bits to a specified position based on M_index to obtain a second bit sequence; applying Polar encoding to the second bit sequence to obtain a Polar encoded bit sequence; and selecting T bits based on the Polar encoded bit sequence as a bit sequence to be transmitted, where K and T are both non-negative integers and K≤T.

CROSS REFERENCE TO RELATED APPLICATIONS

This patent document is a continuation of and claims priority to International Patent Application No. PCT/CN2018/085645, filed on May 4, 2018, which claims priority to Chinese Patent Application No. 201710314013.X, filed on May 5, 2017, and Chinese Patent Application No. 201710737955.9, filed on Aug. 24, 2017. The entire contents of the before-mentioned patent applications are incorporated by reference as part of the disclosure of this application.

TECHNICAL FIELD

The present disclosure relates to communication technology, and more particularly, to a method and an apparatus for sequence determination, a device and a storage medium.

BACKGROUND

Due to the presence of channel noise, a channel coding, as an independent part of a mobile communication system, guarantees the reliability, accuracy and effectiveness of information delivery.

Polar coding is a constructive coding scheme that has been strictly proven to be capable of reaching a channel capacity. Polar code is capable of satisfying requirements of the 5^(th) Generation (5G) New Radio Access Technology (RAT) with respect to communication throughput and latency. A codeword encoded by Polar code can be represented as x=u·G_(N), where u=(u1, . . . , uN) is composed of information bits, known bits and parity check bits, G_(N)=F₂ ^(⊗n), F₂ ^(⊗n) denotes the n-th Kronecker product of F₂,

${F_{2} = \begin{bmatrix} 1 & 0 \\ 1 & 1 \end{bmatrix}},{{{and}\mspace{14mu} n} = {\log\; 2{(N).}}}$

Due to the Polarization characteristics of the Polar codes, input bits have different reliabilities, i.e., input bits at different positions have different Bit Error Rates (BERs). In order to improve a decoding performance, the information bits and the parity check bits are placed at positions having high reliabilities (i.e., positions having low BERs) and the known bits are placed at positions having low reliabilities in an encoding process, such that the Block Error Rate (BLER) can be effectively reduced.

Conventionally, for different mother code lengths of Polar codes, different hardware implementations would be required for permutation and rate matching of the information bits, parity check bits and known bits, which is highly complicated.

Currently, there are no effective solutions to the above problem in the related art.

SUMMARY

The embodiments of the present disclosure provide a method and an apparatus for sequence determination, a device and a storage medium, capable of solving the problem in the related art associated with lack of a sequence determination scheme in the 5G New RAT.

According to an embodiment of the present disclosure, a method for sequence determination is provided. The method includes: mapping a first bit sequence having a length of K bits to a position based on M_index to obtain a second bit sequence; applying Polar encoding to the second bit sequence to obtain a Polar encoded bit sequence; and selecting T bits based on the Polar encoded bit sequence as a bit sequence to be transmitted, where K and T are both non-negative integers and K≤T.

In an embodiment of the present disclosure, the method further includes, prior to mapping the first bit sequence having the length of K bits to the specified position based on M_index to obtain the second bit sequence: applying a first predetermined transform to a first index matrix to obtain a second index matrix and obtaining M_index based on the second index matrix. The first predetermined transform includes row permutation or column permutation.

In an embodiment of the present disclosure, the method further includes, prior to selecting T bits from the Polar encoded bit sequence as the bit sequence to be transmitted: forming a first bit sequence matrix based on the Polar encoded bit sequence; and applying a second predetermined transform to the first bit sequence matrix to obtain a second bit sequence matrix. The second predetermined transform includes row permutation or column permutation. The operation of selecting T bits based on the Polar encoded bit sequence as the bit sequence to be transmitted includes: selecting T bits based on the second bit sequence matrix as the bit sequence to be transmitted.

In an embodiment of the present disclosure, the second index matrix is M_(re), which is a matrix of R_(re) rows and C_(re) columns. The first index matrix is M_(or), which is:

$M_{or} = {\quad{{{\begin{bmatrix} 0 & 1 & 2 & \ldots & {C_{re} - 1} \\ C_{re} & {C_{re} + 1} & {C_{re} + 2} & \ldots & {{2C_{re}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ {\left( {R_{re} - 1} \right) \times C_{re}} & {{\left( {R_{re} - 1} \right) \times C_{re}} + 1} & {{\left( {R_{re} - 1} \right) \times C_{re}} + 2} & \ldots & {{R_{re} \times C_{re}} - 1} \end{bmatrix}\mspace{14mu}{or}\mspace{20mu} M_{or}} = \begin{bmatrix} 0 & R_{re} & {2R_{re}} & \ldots & {\left( {C_{re} - 1} \right) \times R_{re}} \\ 1 & {R_{re} + 1} & {{2R_{re}} + 1} & \ldots & {{\left( {C_{re} - 1} \right) \times R_{re}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ {R_{re} - 1} & {{2R_{re}} - 1} & {{3R_{re}} - 1} & \ldots & {{R_{re} \times C_{re}} - 1} \end{bmatrix}},}}$ where R_(re)×C_(re)≥N, R_(re) and C_(re) are both non-negative integers, and N is a length of the Polar encoded bit sequence.

In an embodiment of the present disclosure, when R_(re) is constant, C_(re) is a minimum value satisfying R_(re)×C_(re)≥N; or when C_(re) is constant, R_(re) is a minimum value satisfying R_(re)×C_(re)≥N.

In an embodiment of the present disclosure, the operation of applying the first predetermined transform to the first index matrix to obtain the second index matrix includes at least one of: the i-th column of M_(re) being obtained from the π₁(i)-th column of M_(or) by means of column permutation, where 0≤i≤C_(re)−1, 0≤π₁(i)≤C_(re)−1, R_(re)×C_(re)≥N, and i and π₁(i) are both non-negative integers; or the j-th row of M_(re) being obtained from the π₂(j)-th row of M_(or), where 0≤j≤R_(re)−1, 0≤π₂(j)≤R_(re)−1, R_(re)×C_(re)≥N, and j and π₂(j) are both non-negative integers.

In an embodiment of the present disclosure, π₁(i) is obtained as at least one of: π₁(i)=BRO(i), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number i into a first binary number (B_(n1-1), B_(n1-2), . . . , B₀), reversing the first binary number to obtain a second binary number (B₀, B₁, . . . , B_(n1-1)) and converting the second binary number into a decimal number π₁(i), where n1=log₂(C_(re)) and 0≤i≤C_(re)−1; i(i)={S1, S2, S3}, where S1={0, 1, . . . , i1−1}, S2={i2, i3, i2+1, i3+1, . . . , i4, i5}, and S3 is a set of elements in {0, 1, . . . , C_(re)−1} other than those included in S1 and S2, where C_(re)/8≤i1≤i2≤C_(re)/3, i2≤i4≤i3≤2C_(re)/3, i3≤i5≤C_(re)−1, i1, i2, i3, i4 and i5 are all non-negative integers, and an intersection of any two of S1, S2 and S3 is null; or π₁(i)={I}, where {I} is a sequence obtained by organizing numerical results of applying a function f(r) to column indices r of M_(or) in ascending or descending order, where 0≤r≤C_(re)−1.

In an embodiment of the present disclosure, f(r) includes at least one of:

${{{f(r)} = {\sum_{{m1} = 0}^{{n1} - 1}{B_{m1} \times 2^{\frac{m1}{k}}}}},}\;$ (B_(n1-1), B_(n1-2), . . . , B₀) is a binary representation of the index r, where 0≤m1≤n1−1, n1=log₂(C_(re)), and k is a non-negative integer; initializing a function value corresponding to r as f₁ ^((r)), and obtaining a function value for each element f_(C) _(re) ^((r)) after n1-th iteration in accordance with a first iteration equation:

$\left\{ {\begin{matrix} {f_{2{m2}}^{({{2r} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m2}^{(r_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m2}^{(r_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2{m2}}^{({2r})} = {f_{m2}^{(r_{1})} + f_{m2}^{(r_{2})}}} \end{matrix},} \right.$ where f₁ ^((r)) is a mean log likelihood ratio; or initializing a function value corresponding to r as f₁ ^((r)), and obtaining a function value for each element f_(C) _(re) ^((r)) after n1-th iteration in accordance with a second iteration equation:

$\left\{ {\begin{matrix} {f_{2{m3}}^{({{2r} - 1})} = {f_{m3}^{(r_{1})} + f_{m3}^{(r_{2})} - {f_{m3}^{(r_{1})}f_{m3}^{(r_{2})}}}} \\ {f_{2{m3}}^{({2r})} = {f_{m3}^{(r_{1})}f_{m3}^{(r_{2})}}} \end{matrix},} \right.$ where f₁ ^((r)) is mutual information, where 1≤m2≤n1, 1≤m3≤n1, and r1, r2, 2r and 2r−1 are all integers larger than or equal to 0 and smaller than or equal to C_(re)−1.

In an embodiment of the present disclosure, π₂(j) is obtained as at least one of: π₂(j)=BRO(j), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number j into a third binary number (B_(n2-1), B_(n2-2), . . . , B₀), reversing the third binary number to obtain a fourth binary number (B₀, B₁, . . . , B_(n2-1)) and converting the fourth binary number into a decimal number π₂(j), where n2=log₂(R_(re)) and 0≤j≤R_(re)−1; λ₂(j)={S4, S5, S6}, where S4={0, 1, . . . , j1−1}, S5={j2, j3, j2+1, j3+1, . . . , j4, j5}, and S6 is a set of elements in {0, 1, . . . , R_(re)−1} other than those included in S4 and S5, where R_(re)/8≤j1≤j2≤R_(re)/3, j2≤j4≤j3≤2 R_(re)/3, j3≤j5≤R_(re)−1, j1, j2, j3, j4 and j5 are all non-negative integers, and an intersection of any two of S4, S5 and S6 is null; or π₂(j)={J}, where {J} is a sequence obtained by organizing numerical results of applying a function f(s) to row indices s of M_(or) in ascending or descending order, where 0≤s≤R_(re)−1.

In an embodiment of the present disclosure, f(s) includes at least one of:

${{f(s)} = {\sum_{{m4} = 0}^{{n2} - 1}\;{B_{m4} \times 2^{\frac{m4}{k}}}}},$ (B_(n2-1), B_(n2-2), . . . , B₀) is a binary representation of the index s, where 0≤m4≤n2−1, n2=log₂(R_(re)), and k is a non-negative integer; initializing a function value corresponding to s as f₁ ^((s)), and obtaining a function value for each element f_(R) _(re) ^((s)) after n2-th iteration in accordance with a third iteration equation:

$\left\{ {\begin{matrix} {f_{2{m5}}^{({{2s} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m5}^{(s_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m5}^{(s_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2{m5}}^{({2s})} = {f_{m5}^{(s_{1})} + f_{m5}^{(s_{2})}}} \end{matrix},} \right.$ where f₁ ^((s)) is a mean log likelihood ratio; or initializing a function value corresponding to s as f₁ ^((s)), and obtaining a function value for each element f_(R) _(re) ^((s)) after n2-th iteration in accordance with a fourth iteration equation:

$\left\{ {\begin{matrix} {f_{2{m6}}^{({{2s} - 1})} = {f_{m6}^{(s_{1})} + f_{m6}^{(s_{2})} - {f_{m6}^{(s_{1})}f_{m6}^{(s_{2})}}}} \\ {f_{2{m6}}^{({2s})} = {f_{m6}^{(s_{1})}f_{m6}^{(s_{2})}}} \end{matrix},} \right.$ where f₁ ^((s)) is mutual information, where 1≤m5≤n2, 1≤m6≤n2, s1, s2, 2s and 2s−1 are all integers larger than or equal to 0 and smaller than or equal to R_(re)−1.

In an embodiment of the present disclosure, the first bit sequence matrix is M_(og). The second bit sequence matrix is M_(vb), which is a matrix of R_(vb) rows and C_(vb) columns. M_(og) is:

${M_{og} = {\left\lbrack \begin{matrix} x_{0} & x_{1} & x_{2} & \ldots & x_{C_{vb} - 1} \\ x_{C_{vb}} & x_{C_{vb} + 1} & x_{C_{vb} + 2} & \ldots & x_{{2C_{vb}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{{({R_{vb} - 1})} \times C_{vb}} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 1} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 2} & \cdots & x_{{R_{vb} \times C_{vb}} - 1} \end{matrix} \right\rbrack\mspace{14mu}{or}}}$ ${M_{og} = \begin{bmatrix} x_{0} & x_{R_{vb}} & x_{2R_{vb}} & \ldots & x_{{({C_{vb} - 1})} \times R_{vb}} \\ x_{1} & x_{R_{vb} + 1} & x_{{2R_{vb}} + 1} & \ldots & x_{{{({C_{vb} - 1})} \times R_{vb}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{R_{vb} - 1} & x_{{2R_{vb}} - 1} & x_{{3R_{vb}} - 1} & \ldots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}},$ where x₀, x₁, x₂, . . . , x_(R) _(vb) _(×C) _(vb) ⁻¹ is the Polar encoded bit sequence, R_(vb)×C_(vb)≥N, R_(vb) and C_(vb) are both non-negative integers and N is a length of the Polar encoded bit sequence.

In an embodiment of the present disclosure, when R_(vb) is constant, C_(vb) is a minimum value satisfying R_(vb)×C_(vb)≥N; or when C_(vb) is constant, R_(vb) is a minimum value satisfying R_(vb)×C_(vb)≥N.

In an embodiment of the present disclosure, the operation of applying the second predetermined transform to the first bit sequence matrix to obtain the second bit sequence matrix includes at least one of: the g-th column of M_(vb) being obtained from the π₃(g)-th column of M_(og) by means of column permutation, where 0≤g≤C_(vb)−1, 0≤π₃(g)≤C_(vb)−1, R_(vb)×C_(vb)≥N, and g and π₃(g) are both non-negative integers; or the h-th row of M_(vb) being obtained from the π₄(h)-th row of M_(og) by means of row permutation, where 0≤h≤R_(vb)−1, 0≤π₄(h)≤R_(vb)−1, R_(vb)×C_(vb)≥N, and h and π₄(h) are both non-negative integers.

In an embodiment of the present disclosure, π₃(g) is obtained as at least one of: π₃(g)=BRO(g), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number g into a fifth binary number (B_(n3-1), B_(n3-2), . . . , B₀), reversing the fifth binary number to obtain a sixth binary number (B₀, B₁₁, . . . , B_(n3-1)) and converting the sixth binary number into a decimal number π₃(g), where n3=log₂(C_(vb)) and 0≤g≤C_(vb)−1; π₃(g)={S1, S2, S3}, where S1={0, 1, . . . , g1−1}, S2={g2, g3, g2+1, g3+1, . . . , g4, g5}, and S3 is a set of elements in {0, 1, . . . , C_(vb)−1)} other than those included in S1 and S2, where C_(vb)/8≤g1≤g2≤C_(vb)/3, g2≤g4≤g3≤2C_(vb)/3, g3≤g5≤C_(vb)−1, g1, g2, g3, g4 and g5 are all non-negative integers, and an intersection of any two of S1, S2 and S3 is null; π₃(g)={G}, where {G} is a sequence obtained by organizing numerical results of applying a function f(α) to column indices α of M_(og) in ascending or descending order, where 0≤α≤C_(vb)−1; π₃(g)={Q1, Q2, Q3}, where Q2={q1, q2, q1+1, q2+1, . . . , q3, q4}, 0≤q1≤q3≤(C_(vb)−1)/2, 0≤q2≤q4≤(C_(vb)−1)/2, q1, q2, q3, q4 and q5 are all non-negative integers, Q1 and Q3 are other elements in a difference set between {0, 1, . . . , C_(vb)−1} and Q2, and an intersection of any two of Q1, Q2 and Q3 is null; π₃(g) being different from a predefined sequence V1 in nV1 positions, where V1={0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 16, 13, 17, 14, 18, 15, 19, 20, 24, 21, 22, 25, 26, 28, 23, 27, 29, 30, 31}, 0≤nV1≤23; or π₃(g) being different from a predefined sequence V2 in nV2 positions, where V2={0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31}, 0≤nV2≤3.

In an embodiment of the present disclosure, f(α) includes at least one of:

${{f(\alpha)} = {\sum_{{m6} = 0}^{{n3} - 1}\;{B_{m6} \times 2^{\frac{m6}{k}}}}},$ (B_(n3-1), B_(n3-2), . . . , B₀) is a binary representation of the index α, where 0≤m6≤n3−1, n3=log₂(C_(vb)), and k is a non-negative integer; initializing a function value corresponding to α as f₁ ^((α)), and obtaining a function value for each element f_(C) _(vb) ^((α)) after n3-th iteration in accordance with a fifth iteration equation:

$\left\{ {\begin{matrix} {f_{2{m7}}^{({{2\alpha} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m7}^{(\alpha_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m7}^{(\alpha_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2{m7}}^{({2\alpha})} = {f_{m7}^{(\alpha_{1})} + f_{m7}^{(\alpha_{2})}}} \end{matrix},} \right.$ where f₁ ^((α)) is a mean log likelihood ratio; or initializing a function value corresponding to s as f₁ ^((α)), and obtaining a function value for each element f_(C) _(vb) ^((α)) after n3-th iteration in accordance with a sixth iteration equation:

$\left\{ {\begin{matrix} {f_{2{m8}}^{({{2\alpha} - 1})} = {f_{m8}^{(\alpha_{1})} + f_{m8}^{(\alpha_{2})} - {f_{m8}^{(\alpha_{1})}f_{m8}^{(\alpha_{2})}}}} \\ {f_{2{m8}}^{({2\alpha})} = {f_{m8}^{(\alpha_{1})}f_{m8}^{(\alpha_{2})}}} \end{matrix},} \right.$ where f₁ ^((α)) is mutual information, where 1≤m7≤n3, 1≤m8≤n3, and α1, α2, 2a and 2α−1 are all integers larger than or equal to 0 and smaller than or equal to C_(vb)−1.

In an embodiment of the present disclosure, π₄(h) is obtained as at least one of: π₄(h)=BRO(h), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number h into a seventh binary number (B_(n4-1), B_(n4-2), . . . , B₀), reversing the seventh binary number to obtain an eighth binary number (B₀, B₁, . . . , B_(n4-1)) and converting the eighth binary number into a decimal number π₄(h), where n4=log₂(R_(vb)) and 0≤h≤R_(vb)−1; π₄(h)={S4, S5, S6}, where S4={0, 1, . . . , h1−1}, S5={h2, h3, h2+1, h3+1, . . . , h4, h5}, and S6 is a set of elements in {0, 1, . . . , R_(vb)−1} other than those included in S4 and S5, where R_(vb)/8≤h1≤h2≤R_(vb)/3, h2≤h4≤h3≤2R_(vb)/3, h3≤h5≤R_(vb)−1, h1, h2, h3, h4 and h5 are all non-negative integers, and an intersection of any two of S4, S5 and S6 is null; π₄(h)={H}, where {H} is a sequence obtained by organizing numerical results of applying a function f(β) to row indices β of M_(og) in ascending or descending order, where 0≤β≤R_(vb)−1; π₄(h)={O1, O2, O3}, where O2={o1, o2, o1+1, o2+1, . . . , o3, o4}, 0≤o1≤o3≤(R_(vb)−1)/2, 0≤o2≤o4≤(R_(vb)−1)/2, o1, o2, o3, o4 and o5 are all non-negative integers, O1 and O3 are other elements in a difference set between {0, 1, . . . , R_(vb)−1} and O2, and an intersection of any two of O1, O2 and O3 is null; π₄(h) being different from a predefined sequence VV1 in nVV1 positions, where VV1={0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 16, 13, 17, 14, 18, 15, 19, 20, 24, 21, 22, 25, 26, 28, 23, 27, 29, 30, 31)}, 0≤nVV1≤23; or π₄(h) being different from a predefined sequence VV2 in nVV2 positions, where VV2={0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31}, 0≤nVV2≤3.

In an embodiment of the present disclosure, f(β) includes at least one of:

${{f(\beta)} = {\sum_{{m\; 9} = 0}^{{n\; 4} - 1}{B_{m\; 9} \times 2^{\frac{m\; 9}{k}}}}},$ (B_(n4-1), B_(n4-2), . . . , B₀) is a binary representation of the index β, where 0≤m9≤n4−1, n4=log₂(R_(vb)), and k is a non-negative integer; initializing a function value corresponding to β as f₁ ^((β)), and obtaining a function value for each element f_(R) _(vb) ^((β)) after n4-th iteration in accordance with a seventh iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 10}^{({{2\beta} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m\; 10}^{(\beta_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m\; 10}^{(\beta_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2m\; 10}^{({2\beta})} = {f_{m\; 10}^{(\beta_{1})} + f_{m\; 10}^{(\beta_{2})}}} \end{matrix},} \right.$ where f₁ ^((β)) is a mean log likelihood ratio; or initializing a function value corresponding to β as f₁ ^((β)), and obtaining a function value for each element f_(R) _(vb) ^((β))) after n4-th iteration in accordance with an eighth iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 11}^{({{2\beta} - 1})} = {f_{m\; 11}^{(\beta_{1})} + f_{m\; 11}^{(\beta_{2})} - {f_{m\; 11}^{(\beta_{1})}f_{m\; 11}^{(\beta_{2})}}}} \\ {f_{2m\; 11}^{({2\beta})} = {f_{m\; 11}^{(\beta_{1})}f_{m\; 11}^{(\beta_{2})}}} \end{matrix},} \right.$ where f₁ ^((β)) is mutual information, where 1≤m10≤n4, 1≤m11≤n4, and β1, β2, 2β and 2β−1 are all integers larger than or equal to 0 and smaller than or equal to R_(vb)−1.

In an embodiment of the present disclosure, the operation of obtaining M_index based on the second index matrix includes: selecting a predetermined number of indices from M_(re) row by row, column by column or diagonal by diagonal, as M_index.

In an embodiment of the present disclosure, the operation of selecting the predetermined number of indices from M_(re) column by column includes: selecting π_(p) indices from the p-th column of M_(re), where Σ_(p=1) ^(C) ^(re) K_(p)=K, p is an integer, and 1≤p≤C_(re). The operation of selecting the predetermined number of indices from M_(re) row by row includes: selecting π_(q) indices from the q-th row of M_(re), where Σ_(q=1) ^(R) ^(re) K_(q)=K, q is an integer, and 1≤q≤R_(re). The operation of selecting the predetermined number of indices from M_(re) diagonal by diagonal includes: selecting K_(δ) indices from the δ-th diagonal of M_(re), where

${{\sum_{\delta = {{- {\min{({R_{re},C_{re}})}}} + 1}}^{{\max{({R_{re},C_{re}})}} - 1}K_{\delta}} = K},$ δ is an integer, and −min(R_(re), C_(re))+1≤δ≤max(R_(re), C_(re))−1, where min(R_(re), C_(re)) denotes the smaller of R_(re) and C_(re), and max(R_(re), C_(re)) denotes the larger of R_(re) and C_(re).

In an embodiment of the present disclosure, the operation of selecting the predetermined number of indices from M_(re) column by column includes at least one of: selecting K_(ic1) indices from the 1^(st), 2^(nd), C₁-th columns of M_(re), where Σ_(ic1=1) ^(C) ¹ K_(ic1)=K, 1≤ic1≤C₁, 1≤C₁≤C_(re), and ic1 and C₁ are integers; selecting K_(ic2) indices from the C₂-th, (C₂+1)-th, . . . , C₃-th columns of M_(re), where Σ_(ic2=C) ₂ ^(C) ³ K_(ic2)=K, C₂≤ic2≤C₃, 1C₂≤C₃≤C_(re), and ic2, C₂ and C₃ are integers; or selecting K_(ic3) indices from the C₄-th, (C₄+1)-th, . . . , C_(re)-th columns of M_(re), where Σ_(ic3=C) ₄ ^(C) ^(re) K_(ic3)=K, C₄≤ic3≤C_(re), 1≤C₄≤C_(re), and ic3 and C₄ are integers.

In an embodiment of the present disclosure, the operation of selecting the predetermined number of indices from M_(re) row by row includes at least one of: selecting K_(ir1) indices from the 1^(st), 2^(nd), . . . , R₁-th rows of M_(re), where Σ_(ir1=1) ^(R) ¹ K_(ir1)=K, 1≤ir1≤R₁, 1≤R₁≤R_(re), and ir1 and R₁ are integers; selecting K_(ir2) indices from the R₂-th, (R₂+1)-th, . . . , R₃-th rows of M_(re), where Σ_(ir2=R) ₂ ^(R) ³ K_(ir2)=K, R₂≤ir2≤R₃, 1≤R₂≤R₃≤R_(re), and ir2, R₂ and R₃ are integers; or selecting K_(ir3) indices from the R₄-th, (R₄+1)-th, . . . , R_(re)-th rows of M_(re), where Σ_(ir3=R) ₄ ^(R) ^(re) K_(p)=K, 1≤R₄≤R_(re), and ir3 and R₄ are integers.

In an embodiment of the present disclosure, the operation of selecting the predetermined number of indices from M_(re) diagonal by diagonal includes at least one of: selecting K_(id1) indices from the (−min(R_(re), C_(re))+1)-th, (−min(R_(re), C_(re))+2)-th, . . . , D₁-th diagonals of M_(re), where Σ_(id1=−min(R) _(re) _(, C) _(re) ₎₊₁ ^(D) ¹ K_(id1)=K, −min(R_(re), C_(re))+1≤D₁≤max(R_(re), C_(re))−1, and id1 and D₁ are integers; selecting K_(id2) indices from the D₂-th, (D₂+1)-th, . . . , D₃-th diagonals of M_(re), where Σ_(id2=D) ₂₁ ^(D) ³ K_(id2)=K, −min(R_(re), C_(re))+1≤D₂≤D₃≤max(R_(re), C_(re))−1, and id2, D₂ and D₃ are integers; and selecting K_(id3) indices from the D₄-th, (D₄+1)-th, . . . , (max(R_(re), C_(re))−1)-th diagonals of M_(re), where

${{\sum_{{{id}\; 3} = D_{4}}^{{\max{({R_{re},C_{re}})}} - 1}K_{{id}\; 3}} = K},$ −min(R_(re), C_(re))+1≤D₄≤max(R_(re), C_(re))−1, and id3 and D₄ are integers, where min(R_(re), C_(re)) denotes the smaller of R_(re) and C_(re), and max(R_(re), C_(re)) denotes the larger of R_(re) and C_(re).

In an embodiment of the present disclosure, when the predetermined number of indices are selected from M_(re) row by row, column by column or diagonal by diagonal, each index corresponding to a non-transmitted bit sequence in a second bit sequence matrix is skipped. The second bit sequence matrix is obtained from a first bit sequence matrix by using a second predetermined transform. The first bit sequence matrix is formed from the Polar encoded bit sequence. The second predetermined transform includes row permutation or column permutation.

In an embodiment of the present disclosure, the operation of selecting T bits based on the second bit sequence matrix as the bit sequence to be transmitted includes: selecting T bits based on the second bit sequence matrix row by row, column by column or diagonal by diagonal, as the bit sequence to be transmitted.

In an embodiment of the present disclosure, the operation of selecting T bits based on the second bit sequence matrix row by row, column by column or diagonal by diagonal as the bit sequence to be transmitted includes: selecting T bits based on the second bit sequence matrix row by row, column by column or diagonal by diagonal, from a starting position t in the second bit sequence matrix. When the selection reaches the first or last bit in the second bit sequence matrix, it continues with the last or first bit in the second bit sequence matrix, where 1≤t≤R_(vb)×C_(vb).

In an embodiment of the present disclosure, the operation of selecting T bits based on the second bit sequence matrix row by row, column by column or diagonal by diagonal as the bit sequence to be transmitted includes: selecting the 1^(st) to T-th bits or the (N−T+1)-th to N-th bits from the second bit sequence matrix column by column, when T is smaller than or equal to a length N of the Polar encoded bit sequence; selecting the 1^(st) to T-th bits or the (N−T+1)-th to N-th bits from the second bit sequence matrix row by row, when T is smaller than or equal to the length N of the Polar encoded bit sequence; selecting the 1^(st) to T-th bits or the (N−T+1)-th to N-th bits from the second bit sequence matrix diagonal by diagonal, when T is smaller than or equal to the length N of the Polar encoded bit sequence; selecting, when T is larger than the length N of the Polar encoded bit sequence, T bits row by row, column by column or diagonal by diagonal, from the t-th bit in the second bit sequence matrix. When the selection reaches the first or last bit in the second bit sequence matrix, it continues with the last or first bit in the second bit sequence matrix, where 1≤t≤R_(vb)×C_(vb) and N is a non-negative integer.

In an embodiment of the present disclosure, the operation of selecting T bits from the second bit sequence matrix column by column includes at least one of: selecting T_(ie1) bits from the 1^(st), 2^(nd), . . . , E₁-th columns, where Σ_(ie1=1) ^(E) ¹ T_(ie1)=T, 1≤E₁≤C_(vb), and ie1 and E₁ are integers; selecting T_(ie2) bits from the E₂-th, (E₂+1)-th, . . . , E₃-th columns, where Σ_(ie2=E) ₂ ^(E) ³ T_(ie2)=T, 1≤E₂≤E₃≤C_(re), and ie2, E₂ and E₃ are integers; or selecting T_(ie3) bits from the E₄-th, (E₄+1)-th, . . . E_(vb)-th columns, where Σ_(ie3=E) ₄ ^(C) ^(vb) T_(ie3)=T, 1≤E₄≤C_(vb), and ie3 and E₄ are integers.

In an embodiment of the present disclosure, the operation of selecting T bits from the second bit sequence matrix row by row includes at least one of: selecting Tin bits from the 1^(st), 2^(nd), . . . , F₁-th rows, where Σ_(if1=1) ^(F) ¹ T_(if1)=T, 1≤F₁≤R_(vb), and if1 and F₁ are integers; selecting T_(if2) bits from the F₂-th, (F₂+1)-th, . . . , F₃-th rows, where Σ_(if2=F) ₂ ^(F) ³ T_(if2)=T, 1≤F₂≤F₃≤R_(vb), and if2, F₂ and F₃ are integers; or selecting T_(if3) bits from the F₄-th, (F₄+1)-th, . . . , R_(vb)-th rows, where Σ_(if3=F) ₄ ^(R) ^(vb) T_(if3)=T, 1≤F₄≤R_(vb), and if3 and F₄ are integers.

In an embodiment of the present disclosure, the operation of selecting T bits from the second bit sequence matrix diagonal by diagonal includes at least one of: selecting T_(ig1) bits from the (−min(R_(vb), C_(vb))+1)-th, (−min(R_(vb), C_(vb))+2)-th, . . . , G₁-th diagonals, where Σ_(ig1=−min(R) _(vb) _(, C) _(vb) ₎₊₁ ^(G) ¹ T_(ig1)=T, −min(R_(vb), C_(vb))+1≤G₁≤max(R_(vb), C_(vb))−1, and ig1 and G₁ are integers; selecting K_(ig2) bits from the G₂-th, (G₂+1)-th, . . . , G₃-th diagonals, where Σ_(ig2=G) ₂ ^(G) ³ T_(ig2)=T, −min(R_(vb), C_(vb))+1≤G₂≤G₃≤max(R_(vb), C_(vb))−1, and ig2, G₂ and G₃ are integers; or selecting K_(id3) bits from the G₄-th, (G₄+1)-th, . . . , (max(R_(vb), C_(vb))−1)-th diagonals, where

${{{\sum_{{{ig}\; 3} = G_{4}}^{{\max{({R_{vb},C_{vb}})}} - 1}T_{{ig}\; 3}} = T},}\;$ −min(R_(vb), C_(vb))+1≤G₄≤max(R_(vb), C_(vb))−1, and ig3 and G₄ are integers.

In an embodiment of the present disclosure, M_(og) has 32 columns.

According to an embodiment of the present disclosure, an apparatus for sequence determination is provided. The apparatus includes: a permuting module configured to map a first bit sequence having a length of K bits to a specified position based on M_index to obtain a second bit sequence; an encoding module configured to apply Polar encoding to the second bit sequence to obtain a Polar encoded bit sequence; and a selecting module configured to select T bits based on the Polar encoded bit sequence as a bit sequence to be transmitted, where K and T are both non-negative integers and K≤T.

In an embodiment of the present disclosure, the apparatus further includes: a first transform module configured to apply a first predetermined transform to a first index matrix to obtain a second index matrix and obtain M_index based on the second index matrix. The first predetermined transform includes row permutation or column permutation.

In an embodiment of the present disclosure, the apparatus further includes: a second transform module configured to form a first bit sequence matrix from the Polar encoded bit sequence, and apply a second predetermined transform to the first bit sequence matrix to obtain a second bit sequence matrix. The second predetermined transform includes row permutation or column permutation. The selecting module is further configured to select T bits based on the second bit sequence matrix as the bit sequence to be transmitted.

In an embodiment of the present disclosure, the second index matrix is M_(re), which is a matrix of R_(re) rows and C_(re) columns. The first index matrix is M_(or), which is:

$M_{or} = {\begin{bmatrix} 0 & 1 & 2 & \ldots & {C_{re} - 1} \\ C_{re} & {C_{re} + 1} & {C_{re} + 2} & \ldots & {{2C_{re}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ {\left( {R_{re} - 1} \right) \times C_{re}} & {{\left( {R_{re} - 1} \right) \times C_{re}} + 1} & {{\left( {R_{re} - 1} \right) \times C_{re}} + 2} & \ldots & {{R_{re} \times C_{re}} - 1} \end{bmatrix}\mspace{14mu}{or}}$ ${M_{or} = \begin{bmatrix} 0 & R_{re} & {2R_{re}} & \ldots & {\left( {C_{re} - 1} \right) \times R_{re}} \\ 1 & {R_{re} + 1} & {{2R_{re}} + 1} & \ldots & {{\left( {C_{re} - 1} \right) \times R_{re}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ {R_{re} - 1} & {{2R_{re}} - 1} & {{3R_{re}} - 1} & \ldots & {{R_{re} \times C_{re}} - 1} \end{bmatrix}},$ where R_(re)×C_(re)≥N, R_(re) and C_(re) are both non-negative integers, and N is a length of the Polar encoded bit sequence.

In an embodiment of the present disclosure, when R_(re) is constant, C_(re) is a minimum value satisfying R_(re)×C_(re)≥N; or when C_(re) is constant, R_(re) is a minimum value satisfying R_(re)×C_(re)≥N.

In an embodiment of the present disclosure, the first index matrix is configured such that the second index matrix is obtained according to at least one of: the i-th column of M_(re) being obtained from the π₁(i)-th column of M_(or) by means of column permutation, where 0≤i≤C_(re)−1, 0≤π₁(i)≤C_(re)−1, R_(re)×C_(re)≥N, and i and π₁(i) are both non-negative integers; or the j-th row of M_(re) being obtained from the π₂(j)-th row of M_(or), where 0≤j≤R_(re)−1, 0≤π₂(j)≤R_(re)−1, R_(re)×C_(re)≥N, and j and π₂(j) are both non-negative integers.

In an embodiment of the present disclosure, the first bit sequence matrix is M_(og). The second bit sequence matrix is M_(vb), which is a matrix of R_(vb) rows and C_(vb) columns. M_(og) is:

$M_{og} = {\begin{bmatrix} x_{0} & x_{1} & x_{2} & \ldots & x_{C_{vb} - 1} \\ x_{C_{vb}} & x_{C_{vb} + 1} & x_{C_{vb} + 2} & \ldots & x_{{2C_{vb}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{{({R_{vb} - 1})} \times C_{vb}} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 1} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 2} & \ldots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}\mspace{14mu}{or}}$ $\mspace{20mu}{{M_{og} = \begin{bmatrix} x_{0} & x_{R_{vb}} & x_{2R_{vb}} & \ldots & x_{{({C_{vb} - 1})} \times R_{vb}} \\ x_{1} & x_{R_{vb} + 1} & x_{{2R_{vb}} + 1} & \ldots & x_{{{({C_{vb} - 1})} \times R_{vb}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{R_{vb} - 1} & x_{{2R_{vb}} - 1} & x_{{3R_{vb}} - 1} & \ldots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}},}$ where x₀, x₁, x₂, . . . , x_(R) _(vb) _(×C) _(vb) ⁻¹ is the Polar encoded bit sequence, R_(vb)×C_(vb)≥N, R_(vb) and C_(vb) are both non-negative integers and N is a length of the Polar encoded bit sequence.

In an embodiment of the present disclosure, when R_(vb) is constant, C_(vb) is a minimum value satisfying R_(vb)×C_(vb)≥N; or when C_(vb) is constant, R_(vb) is a minimum value satisfying R_(vb)×C_(vb)≥N.

In an embodiment of the present disclosure, the first bit sequence matrix is configured such that the second bit sequence matrix is obtained according to at least one of: the g-th column of M_(vb) being obtained from the π₃(g)-th column of M_(og) by means of column permutation, where 0≤g≤C_(vb)−1, 0≤π₃(g)≤C_(vb)−1, R_(vb)×C_(vb)≥N, and g and π₃(g) are both non-negative integers; or the h-th row of M_(vb) being obtained from the π₄(h)-th row of M_(og) by means of row permutation, where 0≤h≤R_(vb)−1, 0≤π₄(h)≤R_(vb)−1, R_(vb)×C_(vb)≥N, and h and π₄(h) are both non-negative integers.

In an embodiment of the present disclosure, M_(og) has 32 columns.

According to an embodiment of the present disclosure, a device is provided. The device includes: a processor configured to: map a first bit sequence having a length of K bits to a specified position based on M_index to obtain a second bit sequence; apply Polar encoding to the second bit sequence to obtain a Polar encoded bit sequence; and select T bits based on the Polar encoded bit sequence as a bit sequence to be transmitted, where K and T are both non-negative integers and K≤T, and a memory coupled to the processor.

In an embodiment of the present disclosure, the processor is further configured to: apply a first predetermined transform to a first index matrix to obtain a second index matrix; and obtain M_index based on the second index matrix. The first predetermined transform includes row permutation or column permutation.

In an embodiment of the present disclosure, the processor is further configured to: form a first bit sequence matrix from the Polar encoded bit sequence; apply a second predetermined transform to the first bit sequence matrix to obtain a second bit sequence matrix; and select T bits based on the second bit sequence matrix as the bit sequence to be transmitted. The second predetermined transform includes row permutation or column permutation.

In an embodiment of the present disclosure, the second index matrix is M_(re), which is a matrix of R_(re) rows and C_(re) columns. The first index matrix is M_(or), which is:

$M_{or} = {\begin{bmatrix} 0 & 1 & 2 & \ldots & {C_{re} - 1} \\ C_{re} & {C_{re} + 1} & {C_{re} + 2} & \ldots & {{2C_{re}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ {\left( {R_{re} - 1} \right) \times C_{re}} & {{\left( {R_{re} - 1} \right) \times C_{re}} + 1} & {{\left( {R_{re} - 1} \right) \times C_{re}} + 2} & \ldots & {{R_{re} \times C_{re}} - 1} \end{bmatrix}\mspace{14mu}{or}}$ ${M_{or} = \begin{bmatrix} 0 & R_{re} & {2R_{re}} & \ldots & {\left( {C_{re} - 1} \right) \times R_{re}} \\ 1 & {R_{re} + 1} & {{2R_{re}} + 1} & \ldots & {{\left( {C_{re} - 1} \right) \times R_{re}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ {R_{re} - 1} & {{2R_{re}} - 1} & {{3R_{re}} - 1} & \ldots & {{R_{re} \times C_{re}} - 1} \end{bmatrix}},$ where R_(re)×C_(re)≥N, R_(re) and C_(re) are both non-negative integers, and N is a length of the Polar encoded bit sequence.

In an embodiment of the present disclosure, when R_(re) is constant, C_(re) is a minimum value satisfying R_(re)×C_(re)≥N; or when C_(re) is constant, R_(re) is a minimum value satisfying R_(re)×C_(re)≥N.

In an embodiment of the present disclosure, the processor is further configured to obtain the second index matrix according to at least one of: the i-th column of M_(re) being obtained from the π₁(i)-th column of M_(or) by means of column permutation, where 0≤i≤C_(re)−1, 0≤π₁(i)≤C_(re)−1, R_(re)×C_(re)≥N, and i and π₁(i) are both non-negative integers; or the j-th row of M_(re) being obtained from the π₂(j)-th row of M_(or), where 0≤j≤R_(re)−1, 0≤π₂(j)≤R_(re)−1, R_(re)×C_(re)≥N, and j and π₂(j) are both non-negative integers.

In an embodiment of the present disclosure, the first bit sequence matrix is M_(og). The second bit sequence matrix is M_(vb), which is a matrix of R_(vb) rows and C_(vb) columns. M_(og) is:

$M_{og} = {\begin{bmatrix} x_{0} & x_{1} & x_{2} & \ldots & x_{C_{vb} - 1} \\ x_{C_{vb}} & x_{C_{vb} + 1} & x_{C_{vb} + 2} & \ldots & x_{{2C_{vb}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{{({R_{vb} - 1})} \times C_{vb}} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 1} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 2} & \ldots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}\mspace{14mu}{or}}$ $\mspace{20mu}{{M_{og} = \begin{bmatrix} x_{0} & x_{R_{vb}} & x_{2R_{vb}} & \ldots & x_{{({C_{vb} - 1})} \times R_{vb}} \\ x_{1} & x_{R_{vb} + 1} & x_{{2R_{vb}} + 1} & \ldots & x_{{{({C_{vb} - 1})} \times R_{vb}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{R_{vb} - 1} & x_{{2R_{vb}} - 1} & x_{{3R_{vb}} - 1} & \ldots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}},}$ where x₀, x₁, x₂, . . . , x_(R) _(vb) _(×C) _(vb) ⁻¹ is the Polar encoded bit sequence, R_(vb)×C_(vb)≥N, R_(vb) and C_(vb) are both non-negative integers and N is a length of the Polar encoded bit sequence.

In an embodiment of the present disclosure, when R_(vb) is constant, C_(vb) is a minimum value satisfying R_(vb)×C_(vb)≥N; or when C_(vb) is constant, R_(vb) is a minimum value satisfying R_(vb)×C_(vb)≥N.

In an embodiment of the present disclosure, the processor is configured to obtain the second bit sequence matrix according to at least one of: the g-th column of M_(vb) being obtained from the π₃(g)-th column of M_(og) by means of column permutation, where 0≤g≤C_(vb)−1, 0≤π₃(g)≤C_(vb)−1, R_(vb)×C_(vb)≥N, and g and π₃(g) are both non-negative integers; or the h-th row of M_(vb) being obtained from the π₄(h)-th row of M_(og) by means of row permutation, where 0≤h≤R_(vb)−1, 0≤π₄(h)≤R_(vb)−1, R_(vb)×C_(vb)≥N, and h and π₄(h) are both non-negative integers.

In an embodiment of the present disclosure, M_(og) has 32 columns.

According to another embodiment of the present disclosure, a storage medium is provided. The storage medium stores a program which, when executed, performs the method according to any of the above embodiments.

According to yet another embodiment of the present disclosure, a processor is provided. The processor is configured to execute a program for performing the method according to any of the above embodiments.

With the present disclosure, a first bit sequence having a length of K bits is mapped to a specified position based on M_index to obtain a second bit sequence. Polar encoding is applied to the second bit sequence to obtain a Polar encoded bit sequence. T bits are selected based on the Polar encoded bit sequence as a bit sequence to be transmitted. That is, the present disclosure provides a method for determining a bit sequence to be transmitted, capable of solving the problem in the related art associated with lack of a sequence determination scheme in the 5G New RAT.

BRIEF DESCRIPTION OF THE DRAWINGS

The present disclosure can be further understood with reference to the figures described below, which constitute a part of the present disclosure. The illustrative embodiments of the present disclosure and descriptions thereof are provided for explaining, rather than limiting, the present disclosure. In the figures:

FIG. 1 is a block diagram showing a hardware structure of a mobile terminal in which a method for sequence determination can be applied according to an embodiment of the present disclosure;

FIG. 2 is a flowchart illustrating a method for sequence determination according to an embodiment of the present disclosure;

FIG. 3 is a block diagram showing a structure of an apparatus for sequence determination according to an embodiment of the present disclosure; and

FIG. 4 is a block diagram showing a structure of a device according to Embodiment 3 of the present disclosure.

DETAILED DESCRIPTION OF THE EMBODIMENTS

In the following, the present disclosure will be described in detail with reference to the figures, taken in conjunction with the embodiments. The embodiments, and the features thereof, can be combined with each other, provided that they do not conflict.

It is to be noted that, the terms such as “first”, “second” and so on in the description, claims and figures are used for distinguishing among similar objects and do not necessarily imply any particularly order or sequence.

Embodiment 1

The method according to Embodiment 1 of the present disclosure can be performed in a mobile terminal, a computer terminal or a similar computing device. When the method is performed in a mobile terminal for example, FIG. 1 is a block diagram showing a hardware structure of a mobile terminal in which a method for sequence determination can be applied according to an embodiment of the present disclosure. As shown in FIG. 1, the mobile terminal 10 can include: one or more processors 102 (only one is shown, including, but not limited to, a processing device such as a microprocessor or a Micro Control Unit (MCU) or a programmable logic device such as Field Programmable Gate Array (FPGA)), a memory 104 for storing data, and a transmission device 106 for providing communication functions. It can be appreciated by those skilled in the art that the structure shown in FIG. 1 is illustrative only, and the structure of the above electronic device is not limited thereto. For example, the mobile terminal 10 may include more or less components than those shown in FIG. 1, or have a different configuration from the one shown in FIG. 1.

The memory 104 can store software programs and modules of software applications, e.g., program instructions/modules associated with the method for sequence determination according to an embodiment of the present disclosure. The processor 102 performs various functional applications and data processing operations, i.e., performing the above method, by executing the software programs and modules stored in the memory 104. The memory 104 may include a random cache or a non-volatile memory such as one or more magnetic storage devices, flash memories or other non-volatile solid-state memories. In some examples, the memory 104 may further include one or more memories provided remotely from the processor 102, which can be connected to the mobile terminal 10 via a network. Examples of such network include, but not limited to, Internet, an intranet of an enterprise, a Local Area Network (LAN), a mobile communication network, or any combination thereof.

The transmission device 106 can transmit or receive data via a network. The network can be e.g., a wireless network provided by a communication provider of the mobile terminal 10. In an example, the transmission device 106 includes a Network Interface Controller (NIC), which can be connected to other network devices via a base station for communication with Internet. In an example, the transmission device 106 can be a Radio Frequency (RF) module for communicating with Internet wirelessly.

Alternatively, the method according to Embodiment 1 of the present disclosure can be, but not limited to be, performed in network device, e.g., a base station.

In this embodiment, a method performed in the above mobile terminal or network device for sequence determination is provided. FIG. 2 is a flowchart illustrating a method for sequence determination according to this embodiment. As shown in FIG. 2, the process includes the following steps.

At step S202, a first bit sequence having a length of K bits is mapped to a specified position based on M_index to obtain a second bit sequence.

At step S204, Polar encoding is applied to the second bit sequence to obtain a Polar encoded bit sequence.

At step S206, T bits are selected based on the Polar encoded bit sequence as a bit sequence to be transmitted, where K and T are both non-negative integers and K≤T.

With the above steps, a first bit sequence having a length of K bits is mapped to a specified position based on M_index to obtain a second bit sequence. Polar encoding is applied to the second bit sequence to obtain a Polar encoded bit sequence. T bits are selected based on the Polar encoded bit sequence as a bit sequence to be transmitted. That is, the present disclosure provides a method for determining a bit sequence to be transmitted, capable of solving the problem in the related art associated with lack of a sequence determination scheme in the 5G New RAT.

It is to be noted that the above method may further include, prior to the step S202: applying a first predetermined transform to a first index matrix to obtain a second index matrix and obtaining M_index based on the second index matrix. The first predetermined transform includes row permutation or column permutation. That is, in the Polar encoding process, the same transform pattern is applied to one dimension of the first index matrix, such that only the other dimension of the first index matrix needs to be changed when a mother code length changes. Thus, the hardware can be reused in the implementation of Polar codes, thereby solving the problem in the related art associated with incapability of hardware reuse in the Polar encoding process.

It is to be noted that the method can further include, prior to selecting T bits based on the Polar encoded bit sequence as the bit sequence to be transmitted: forming a first bit sequence matrix from the Polar encoded bit sequence; and applying a second predetermined transform to the first bit sequence matrix to obtain a second bit sequence matrix. The second predetermined transform includes row permutation or column permutation. The operation of selecting T bits based on the Polar encoded bit sequence as the bit sequence to be transmitted includes: selecting T bits based on the second bit sequence matrix as the bit sequence to be transmitted. That is, the same transform pattern is applied to one dimension of the first bit sequence matrix, such that only the other dimension of the first bit sequence matrix needs to be changed when a mother code length changes. Thus, the hardware can be further reused in the implementation of Polar codes, thereby further solving the problem in the related art associated with incapability of hardware reuse in the Polar encoding process.

It is to be noted that the above method can further include, subsequent to applying the second predetermined transform to the first bit sequence matrix to obtain the second bit sequence matrix: storing bit sequences in the second bit sequence matrix in a buffer and selecting T bits from the buffer as the bit sequence to be transmitted.

It is to be noted that the above buffer can be, but not limited to be, embodied as another physical or logic entity.

It is to be noted that the above first index matrix can be, but not limited to, a two dimensional, three dimensional or multi-dimensional matrix. In an example where the above first index matrix is a two dimensional matrix, the above first predetermined transform can be embodied such that a row transform pattern or a column transform pattern for the first index matrix is the same.

In an example where the above first index matrix is a two dimensional matrix, in an embodiment of the present disclosure, the second index matrix is M_(re), which is a matrix of R_(re) rows and C_(re) columns. The first index matrix is M_(or), which is:

$M_{or} = {\begin{bmatrix} 0 & 1 & 2 & \ldots & {C_{re} - 1} \\ C_{re} & {C_{re} + 1} & {C_{re} + 2} & \ldots & {{2C_{re}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ {\left( {R_{re} - 1} \right) \times C_{re}} & {{\left( {R_{re} - 1} \right) \times C_{re}} + 1} & {{\left( {R_{re} - 1} \right) \times C_{re}} + 2} & \ldots & {{R_{re} \times C_{re}} - 1} \end{bmatrix}\mspace{14mu}{or}}$ ${M_{or} = \begin{bmatrix} 0 & R_{re} & {2R_{re}} & \ldots & {\left( {C_{re} - 1} \right) \times R_{re}} \\ 1 & {R_{re} + 1} & {{2R_{re}} + 1} & \ldots & {{\left( {C_{re} - 1} \right) \times R_{re}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ {R_{re} - 1} & {{2R_{re}} - 1} & {{3R_{re}} - 1} & \ldots & {{R_{re} \times C_{re}} - 1} \end{bmatrix}},$ where R_(re)×C_(re)≥N, R_(re) and C_(re) are both non-negative integers, and N is a length of the Polar encoded bit sequence.

It is to be noted that the above R_(re) and C_(re) have one of the following characteristics: when R_(re) is constant, C_(re) is a minimum value satisfying R_(re)×C_(re)≥N; or when C_(re) is constant, R_(re) is a minimum value satisfying R_(re)×C_(re)≥N.

It is to be noted that the operation of applying the first predetermined transform to the first index matrix to obtain the second index matrix includes at least one of: the i-th column of M_(re) being obtained from the π₁(i)-th column of M_(or) by means of column permutation, where 0≤i≤C_(re)−1, 0≤π₁(i)≤C_(re)−1, R_(re) C_(re)≥N, and i and π₁(i) are both non-negative integers; or the j-th row of M_(re) being obtained from the π₂(j)-th row of M_(or), where 0≤j≤R_(re)−1, 0≤π₂(j)≤R_(re)−1, R_(re)×C_(re)≥N, and j and π₂(j) are both non-negative integers.

In the Polar encoding process, as the permutation pattern from M_(or) to M_(re) is the same for each row, if the number of columns of each of M_(or) and M_(re) is fixed, when the mother code length of the Polar codes changes, only the number of rows of each of M_(or) and M_(re) needs to be changed. Alternatively, the permutation pattern from M_(or) to M_(re) can be the same for each column and, if the number of rows of each of M_(or) and M_(re) is fixed, when the mother code length of the Polar codes changes, only the number of columns of each of M_(or) and M_(re) needs to be changed. In this way, in the implementation of the Polar codes, if the hardware for mapping input bit sequences to input positions in the encoder is designed for the maximum mother code length N_(max), it also applies to situations where the mother code length is smaller than N_(max), which allows reuse of the hardware.

It is to be noted that the number of columns of the above M_(og) is 32.

It is to be noted that the above π₁(i) can be obtained according to at least one of:

Scheme 1: π₁(i)=BRO(i), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number i into a first binary number (B_(n1-1), B_(n1-2), . . . , B₀), reversing the first binary number to obtain a second binary number (B₀, B₁, . . . , B_(n1-1)) and converting the second binary number into a decimal number π₁(i), where n1=log₂(C_(re)) and 0≤i≤C_(re)−1;

Scheme 2: π₁(i)={S1, S2, S3}, where S1={0, 1, . . . , i1−1}, S2={i2, i3, i2+1, i3+1, . . . , i4, i5}, and S3 is a set of elements in {0, 1, . . . , C_(re)−1} other than those included in S1 and S2, where C_(re)/8≤i1≤i2≤C_(re)/3, i2≤i4≤i3≤2C_(re)/3, i3≤i5≤C_(re)−1, i1, i2, i3, i4 and i5 are all non- negative integers, and an intersection of any two of S1, S2 and S3 is null; or

Scheme 3: π₁(i)={I}, where {I} is a sequence obtained by organizing numerical results of applying a function f(r) to column indices r of M_(or) in ascending or descending order, where 0≤r≤C_(re)−1.

The above three schemes will be explained with reference to the following examples.

For Scheme 1, if C_(re)=8, i=6, then n1=log₂(8)=3. i=6 is converted into a binary number (B₂, B₁, B₀)=(1, 1, 0). The binary number (B₂, B₁, B₀)=(1, 1, 0) is reversed to obtain (B₀, B₁, B₂)=(0, 1, 1). (B₀, B₁, B₂)=(0, 1, 1) is then converted into a decimal number π₁(i)=3.

For Scheme 2, if C_(re)=8, i₁=2, i₂=2, i₃=4, i₄=3 and i₅=5, then S1={0, 1}, S2={2, 4, 3, 5}, S3={6, 7}, and π₁(i)={0, 1, 2, 4, 3, 5, 6, 7}.

For Scheme 3, C_(re)=8, {f(0), . . . , f(7)}={0, 1, 1.18, 2.18, 1.41, 2.41, 2.60, 3.60}. f(0), . . . , f(7) is organized in ascending order to obtain 1 i(i)={1, 2, 3, 5, 4, 6, 7, 8}.

It is to be noted that f(r) includes at least one of:

${{f(r)} = {\sum_{{m\; 1} = 0}^{{n\; 1} - 1}{B_{m\; 1} \times 2^{\frac{m\; 1}{k}}}}},$ (B_(n1-1), B_(n1-2), . . . , B₀) is a binary representation of the index r, where 0≤m1≤n1−1, n1=log₂(C_(re)), and k is a non-negative integer (e.g., C_(re)=8, i=6, k=4, n1=log₂(8)=3, i=6 is converted into a binary number (B₂, B₁, B₀)=(1, 1, 0),

${{f(6)} = {{\sum_{{m\; 1} = 0}^{{n\; 1} - 1}{B_{m\; 1} \times 2^{\frac{m\; 1}{4}}}} = {{{0 \times 2^{\frac{0}{4}}} + {1 \times 2^{\frac{1}{4}}} + {1 \times 2^{\frac{2}{4}}}} = 2.4142}}},$ where ( ) Σ is a summation equation);

initializing a function value corresponding to r as f₁ ^((r)), and obtaining a function value for each element f_(C) _(re) ^((r)) after n1-th iteration in accordance with a first iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 2}^{({{2r} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m\; 2}^{(r_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m\; 2}^{(r_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2m\; 2}^{({2r})} = {f_{m\; 2}^{(r_{1})} + f_{m\; 2}^{(r_{2})}}} \end{matrix},} \right.$ where f₁ ^((r)) is a mean log likelihood ratio (e.g., φ(z) can be approximately:

${\varphi(z)} = \left\{ {\begin{matrix} {{1 - {\frac{1}{\sqrt{4{\pi z}}}{\int_{- \infty}^{+ \infty}{\tanh\frac{u}{2}{\exp\left( {{- \left( {u - z} \right)^{2}}/\left( {4z} \right)} \right)}{du}}}}}\ } & {z > 0} \\ 1 & {z = 0} \end{matrix},} \right.$ where the nodes i₁ and i₂ involving in the iterative calculation are dependent on the structure of the Polar encoder);

(Let the initial value f₁ ^((r))=2/σ², where σ² is the variance of noise, C_(re)=8, σ²=0. f₁ ^((r)) is substituted into the iteration equation to obtain f₂ ^((r)), which is then substituted into the iteration equation to obtain f₄ ^((r)), and so on, until f₈ ^((r)) is calculated, where f(r)=f₈ ^((r)), 0≤r≤C_(re)−1, {f(0), . . . , f(7)}={0.04, 0.41, 0.61, 3.29, 1.00, 4.56, 5.78, 16.00}); or

initializing a function value corresponding to r as f₁ ^((r)), and obtaining a function value for each element f_(C) _(re) ^((r)) after n1-th iteration in accordance with a second iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 3}^{({{2r} - 1})} = {f_{m\; 3}^{(r_{1})} + f_{m\; 3}^{(r_{2})} - {f_{m\; 3}^{(r_{1})}f_{m\; 3}^{(r_{2})}}}} \\ {f_{2m\; 3}^{({2r})} = {f_{m\; 3}^{(r_{1})}f_{m\; 3}^{(r_{2})}}} \end{matrix},} \right.$ where f₁ ^((r)) is mutual information, where 1≤m2≤n1, 1≤m3≤n1, and r1, r2, 2r and 2r−1 are all integers larger than or equal to 0 and smaller than or equal to C_(re)−1 (the nodes i₁ and i₂ involving in the iterative calculation are dependent on the structure of the Polar encoder);

(Let f₁ ^((r))=0.5 and C_(re)=8. f₁ ^((r)) is substituted into the iteration equation to obtain f₂ ^((r)), which is then substituted into the iteration equation to obtain f₄ ^((r)), and so on, until f₈ ^((r)) is calculated, where f(r)=f₈ ^((r)), 0≤i≤C_(re)−1,

{f(0), . . . , f(7)}={0.008, 0.152, 0.221, 0.682, 0.313, 0.779, 0.850, 0.991}).

It is to be noted that the above π₂(j) can be obtained according to at least one of:

π₂(j)=BRO(j), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number j into a third binary number (B_(n2-1), B_(n2-2), . . . , B₀), reversing the third binary number to obtain a fourth binary number (B₀, B₁, . . . , B_(n2-1)) and converting the fourth binary number into a decimal number π₂(j), where n2=log₂(R_(re)) and 0≤j≤R_(re)−1;

π₂(j)={S4, S5, S6}, where S4={0, 1, . . . , j1−1}, S5={j2, j3, j2+1, j3+1, . . . , j4, j5}, and S6 is a set of elements in {0, 1, . . . , R_(re)−1} other than those included in S4 and S5, where R_(re)/8≤j1≤j2≤R_(re)/3, j2≤j4≤j3≤2 R_(re)/3, j3≤j5≤R_(re)−1, j1, j2, j3, j4 and j5 are all non- negative integers, and an intersection of any two of S4, S5 and S6 is null; or

π₂(j)={J}, where {J} is a sequence obtained by organizing numerical results of applying a function f(s) to row indices s of M_(or) in ascending or descending order, where 0≤s≤R_(re).

It is to be noted that f(s) includes at least one of:

${{f(s)} = {\sum_{{m\; 4} = 0}^{{n\; 2} - 1}{B_{m\; 4} \times 2^{\frac{m\; 4}{k}}}}},$ (B_(n2-1), B_(n2-2), . . . , B₀) is a binary representation of the index s, where 0≤m4≤n2−1, n2=log₂(R_(re)), and k is a non-negative integer;

initializing a function value corresponding to s as f₁ ^((s)), and obtaining a function value for each element f_(R) _(re) ^((s)) after n2-th iteration in accordance with a third iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 5}^{({{2s} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m\; 5}^{(s_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m\; 5}^{(s_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2m\; 5}^{({2s})} = {f_{m\; 5}^{(s_{1})} + f_{m\; 5}^{(s_{2})}}} \end{matrix},} \right.$ where f₁ ^((s)) is a mean log likelihood ratio; or

initializing a function value corresponding to s as f(s), and obtaining a function value for each element f_(R) _(re) ^((s)) by updating f₁ ^((s)) for n2 iterations in accordance with a fourth iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 6}^{({{2s} - 1})} = {f_{m\; 6}^{(s_{1})} + f_{m\; 6}^{(s_{2})} - {f_{m\; 6}^{(s_{1})}f_{m\; 6}^{(s_{2})}}}} \\ {f_{2m\; 6}^{({2s})} = {f_{m\; 6}^{(s_{1})}f_{m\; 6}^{(s_{2})}}} \end{matrix},} \right.$ where f₁ ^((s)) is mutual information, where 1≤m5≤n2, 1≤m6≤n2, s1, s2, 2s and 2s−1 are all integers larger than or equal to 0 and smaller than or equal to R_(re)−1.

It is to be noted that, for explanations for the above π₂(j), reference can be made to π₁(i).

It is to be noted that the above first bit sequence matrix can be, but not limited to, a two dimensional, three dimensional or multi-dimensional matrix. In an example where the above first bit sequence matrix is a two dimensional matrix, the above second predetermined transform can be embodied such that a row transform pattern or a column transform pattern for the first bit sequence matrix is the same.

It is to be noted that the first bit sequence matrix is M_(og). The second bit sequence matrix is M_(vb), which is a matrix of R_(vb) rows and C_(vb) columns. M_(og) is:

$M_{og} = {\begin{bmatrix} x_{0} & x_{1} & x_{2} & \ldots & x_{C_{vb} - 1} \\ x_{C_{vb}} & x_{C_{vb} + 1} & x_{C_{vb} + 2} & \ldots & x_{{2C_{vb}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{{({R_{vb} - 1})} \times C_{vb}} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 1} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 2} & \ldots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}\mspace{14mu}{or}}$ $\mspace{20mu}{\quad{{M_{og} = \begin{bmatrix} x_{0} & x_{R_{vb}} & x_{2R_{vb}} & \ldots & x_{{({C_{vb} - 1})} \times R_{vb}} \\ x_{1} & x_{R_{vb} + 1} & x_{{2R_{vb}} + 1} & \ldots & x_{{{({C_{vb} - 1})} \times R_{vb}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{R_{vb} - 1} & x_{{2R_{vb}} - 1} & x_{{3R_{vb}} - 1} & \ldots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}},}}$ where x₀, x₁, x₂, . . . , x_(R) _(vb) _(×C) _(vb) ⁻¹ is the Polar encoded bit sequence, R_(vb)×C_(vb)≥N, R_(vb) and C_(vb) are both non-negative integers and N is a length of the Polar encoded bit sequence.

It is to be noted that when R_(vb) is constant, C_(vb) is a minimum value satisfying R_(vb)×C_(vb)≥N; or when C_(vb) is constant, R_(vb) is a minimum value satisfying R_(vb)×C_(vb)≥N.

It is to be noted that the operation of applying the second predetermined transform to the first bit sequence matrix to obtain the second bit sequence matrix can include at least one of: the g-th column of M_(vb) being obtained from the π₃(g)-th column of M_(og) by means of column permutation, where 0≤g≤C_(vb)−1, 0≤π₃(g)≤C_(vb)−1, R_(vb)×C_(vb)≥N, and g and π₃(g) are both non-negative integers; or the h-th row of M_(vb) being obtained from the π₄(h)-th row of M_(og) by means of row permutation, where 0≤h≤R_(vb)−1, 0≤π₄(h)≤R_(vb)−1, R_(vb)×C_(vb)≥N, and h and π₄(h) are both non-negative integers.

In the encoding process, the process of selecting appropriate bits from the encoded bit sequence to form a bit sequence to be transmitted is a rate matching process. In the Polar encoding process, as the permutation pattern from M_(og) to M_(vb) is the same for each row, if the number of columns of each of M_(og) and M_(vb) is fixed, when the mother code length of the Polar codes changes, only the number of rows of each of M_(og) and M_(vb) needs to be changed. Alternatively, the permutation pattern from M_(og) to M_(vb) can be the same for each column and, if the number of rows of each of M_(og) and M_(vb) is fixed, when the mother code length of the Polar codes changes, only the number of columns of each of M_(og) and M_(vb) needs to be changed.

In this way, in the implementation of the Polar codes, if the hardware for mapping input bit sequences to input positions in the encoder is designed for the maximum mother code length N_(max), it also applies to situations where the mother code length is smaller than N_(max), which allows reuse of the hardware.

It is to be noted that π₃(g) can be obtained according to at least one of:

π₃(g)=BRO(g), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number g into a fifth binary number (B_(n3-1), B_(n3-2), . . . , B₀), reversing the fifth binary number to obtain a sixth binary number (B₀, B₁₁, . . . , B_(n3-1)) and converting the sixth binary number into a decimal number π₃(g), where n3=log₂(C_(vb)) and 0≤g≤C_(vb)−1;

π₃(g)={S1, S2, S3}, where S1={0, 1, . . . , g1−1}, S2={g2, g3, g2+1, g3+1, . . . , g4, g5}, and S3 is a set of elements in {0, 1, . . . , C_(vb)−1} other than those included in S1 and S2, where C_(vb)/8≤g1≤g2≤C_(vb)/3, g2≤g4≤g3≤2C_(vb)/3, g3≤g5≤C_(vb)−1, g1, g2, g3, g4 and g5 are all non- negative integers, and an intersection of any two of S1, S2 and S3 is null;

π₃(g)={G}, where {G} is a sequence obtained by organizing numerical results of applying a function f(α) to column indices α of M_(og) in ascending or descending order, where 0≤α≤C_(vb)−1;

π₃(g)={Q1, Q2, Q3}, where Q2={q1, q2, q1+1, q2+1, . . . , q3, q4}, 0≤q1≤q3≤(C_(vb)−1)/2, 0≤q2≤q4≤(C_(vb)−1)/2, q1, q2, q3, q4 and q5 are all non-negative integers, Q1 and Q3 are other elements in a difference set between {0, 1, . . . , C_(vb)−1} and Q2, and an intersection of any two of Q1, Q2 and Q3 is null;

π₃(g) being different from a predefined sequence V1 in nV1 positions, where V1={0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 16, 13, 17, 14, 18, 15, 19, 20, 24, 21, 22, 25, 26, 28, 23, 27, 29, 30, 31}, 0≤nV1≤23; or

π₃(g) being different from a predefined sequence V2 in nV2 positions, where V2={0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31}, 0≤nV2≤3.

It is to be noted that f(α) includes at least one of:

${{f(\alpha)} = {\sum_{{m\; 6} = 0}^{{n\; 3} - 1}{B_{m\; 6} \times 2^{\frac{m\; 6}{k}}}}},$ (B_(n3-1), B_(n3-2), . . . , B₀) is a binary representation of the index α, where 0≤m6≤n3−1, n3=log₂(C_(vb)), and k is a non-negative integer;

initializing a function value corresponding to α as f₁ ^((α)), and obtaining a function value for each element f_(C) _(vb) ^((α)) after n3-th iteration in accordance with a fifth iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 7}^{({{2\alpha} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m\; 7}^{(\alpha_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m\; 7}^{(\alpha_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2m\; 7}^{({2\alpha})} = {f_{m\; 7}^{(\alpha_{1})} + f_{m\; 7}^{(\alpha_{2})}}} \end{matrix},} \right.$ where f₁ ^((α)) is a mean log likelihood ratio; or

initializing a function value corresponding to s as f₁ ^((α)), and obtaining a function value for each element after n3-th iteration in accordance with a sixth iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 8}^{({{2\alpha} - 1})} = {f_{m\; 8}^{(\alpha_{1})} + f_{m\; 8}^{(\alpha_{2})} - {f_{m\; 8}^{(\alpha_{1})}f_{m\; 8}^{(\alpha_{2})}}}} \\ {f_{2m\; 8}^{({2\alpha})} = {f_{m\; 8}^{(\alpha_{1})}f_{m\; 8}^{(\alpha_{2})}}} \end{matrix},} \right.$ where f₁ ^((α)) is mutual information, where 1≤m7≤n3, 1≤m8≤n3, and α1, α2, 2α and 2α−1 are all integers larger than or equal to 0 and smaller than or equal to C_(vb)−1.

It is to be noted that π₄(h) can be obtained according to at least one of:

π₄(h)=BRO(h), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number h into a seventh binary number (B_(n4-1), B_(n4-2), . . . , B₀), reversing the seventh binary number to obtain an eighth binary number (B₀, B₁, . . . , B_(n4-1)) and converting the eighth binary number into a decimal number π₄(h), where n4=log₂(R_(vb)) and 0≤h≤R_(vb)−1;

π₄(h)={S4, S5, S6}, where S4={0, 1, . . . , h1−1}, S5={h2, h3, h2+1, h3+1, . . . , h4, h5}, and S6 is a set of elements in {0, 1, . . . , R_(vb)−1} other than those included in S4 and S5, where R_(vb)/8≤h1≤h2≤R_(vb)/3, h2≤h4≤h3≤2R_(vb)/3, h3≤h5≤R_(vb)−1, h1, h2, h3, h4 and h5 are all non- negative integers, and an intersection of any two of S4, S5 and S6 is null;

π₄(h)={H}, where {H} is a sequence obtained by organizing numerical results of applying a function f(3) to row indices β of M_(og) in ascending or descending order, where 0≤3≤R_(vb)−1;

π₄(h)={O1, O2, O3}, where O2={o1, o2, o1+1, o2+1, . . . , o3, o4}, 0≤o1≤o3≤(R_(vb)−1)/2, 0≤o2≤o4≤(R_(vb)−1)/2, o1, o2, o3, o4 and o5 are all non-negative integers, O1 and O3 are other elements in a difference set between {0, 1, . . . , R_(vb)−1} and O2, and an intersection of any two of O1, O2 and O3 is null;

π₄(h) being different from a predefined sequence VV1 in nVV1 positions, where VV1={0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 16, 13, 17, 14, 18, 15, 19, 20, 24, 21, 22, 25, 26, 28, 23, 27, 29, 30, 31}, 0≤nVV1≤23; or

π₄(h) being different from a predefined sequence VV2 in nVV2 positions, where VV2={0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31}, 0≤nVV2≤3.

It is to be noted that f(β) includes at least one of:

${{f(\beta)} = {\sum_{{m\; 9} = 0}^{{n\; 4} - 1}{B_{m\; 9} \times 2^{\frac{m\; 9}{k}}}}},$ (B_(n4-1), B_(n4-2), . . . , B₀) is a binary representation of the index β, where 0≤m9≤n4−1, n4=log₂(R_(vb)), and k is a non-negative integer;

initializing a function value corresponding to β as f₁ ^((β)), and obtaining a function value for each element f_(R) _(vb) ^((β)) after n4-th iteration in accordance with a seventh iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 10}^{({{2\beta} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m\; 10}^{(\beta_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m\; 10}^{(\beta_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2m\; 10}^{({2\beta})} = {f_{m\; 10}^{(\beta_{1})} + f_{m\; 10}^{(\beta_{2})}}} \end{matrix},} \right.$ where is a mean log likelihood ratio; or

initializing a function value corresponding to β as f₁ ^((β)), and obtaining a function value for each element f_(R) _(vb) ^((β)) after n4-th iteration in accordance with an eighth iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 11}^{({{2\beta} - 1})} = {f_{m\; 11}^{(\beta_{1})} + f_{m\; 11}^{(\beta_{2})} - {f_{m\; 11}^{(\beta_{1})}f_{m\; 11}^{(\beta_{2})}}}} \\ {f_{2m\; 11}^{({2\beta})} = {f_{m\; 11}^{(\beta_{1})}f_{m\; 11}^{(\beta_{2})}}} \end{matrix},} \right.$ where f₁ ^((β))is mutual information, where 1≤m10≤n4, 1≤m11≤n4, and β1, β2, 2β and 2β−1 are all integers larger than or equal to 0 and smaller than or equal to R_(vb)−1.

It is to be noted that, for explanations for π₃(g) and π₄(h), reference can be made to π₁(i) and descriptions thereof will be omitted here.

In an embodiment of the present disclosure, the operation of obtaining M_index based on the second index matrix includes: selecting a predetermined number of indices from M_(re) row by row, column by column or diagonal by diagonal, as M_index.

In an embodiment of the present disclosure, the operation of selecting the predetermined number of indices from M_(re) column by column includes: selecting π_(p) indices from the p-th column of M_(re), where Σ_(p=1) ^(C) ^(re) K_(p)=K, p is an integer, and 1≤p≤C_(re). The operation of selecting the predetermined number of indices from M_(re) row by row includes: selecting π_(q) indices from the q-th row of M_(re), where Σ_(q=1) ^(R) ^(re) K_(q)=K, q is an integer, and 1≤q≤R_(re). The operation of selecting the predetermined number of indices from M_(re) diagonal by diagonal includes: selecting K_(δ) indices from the δ-th diagonal of M_(re), where

${{\sum_{\delta = {{- {\min{({R_{re},C_{re}})}}} + 1}}^{{\max{({R_{re},C_{re}})}} - 1}K_{\delta}} = K},$ δ is an integer, and −min(R_(re), C_(re))+1≤δ≤max(R_(re), C_(re))−1, where min(R_(re), C_(re)) denotes the smaller of R_(re) and C_(re), and max(R_(re), C_(re)) denotes the larger of R_(re) and C_(re).

In an embodiment of the present disclosure, the operation of selecting the predetermined number of indices from M_(re) column by column includes at least one of: selecting K_(ic1) indices from the 1^(st), 2^(nd), C₁-th columns of M_(re), where Σ_(ic1=1) ^(C) ¹ K_(ic1)=K, 1≤ic1≤C₁, 1≤C₁≤C_(re), and ic1 and C₁ are integers; selecting K_(ic2) indices from the C₂-th, (C₂+1)-th, . . . , C₃-th columns of M_(re), where Σ_(ic2=C) ₂ ^(C) ³ K_(ic2)=K, C₂≤ic2≤C₃, 1≤C₂≤C₃≤C_(re), and ic2, C₂ and C₃ are integers; or selecting K_(ic3) indices from the C₄-th, (C₄+1)-th, . . . , C_(re)-th columns of M_(re), where Σ_(ic3=C) ₄ ^(C) ^(re) K_(ic3)=K, C₄≤ic3≤C_(re), 1≤C₄≤C_(re), and ic3 and C₄ are integers.

In an embodiment of the present disclosure, the operation of selecting the predetermined number of indices from M_(re) row by row includes at least one of: selecting K_(ir1) indices from the 1^(st), 2^(nd), . . . , R₁-th rows of M_(re), where Σ_(ir1=1) ^(R) ¹ K_(ir1)=K, 1≤ir1≤R₁, 1≤R₁≤R_(re), and ir1 and R₁ are integers; selecting K_(ir2) indices from the R₂-th, (R₂+1)-th, . . . , R₃-th rows of M_(re), where Σ_(ir2=R) ₂ ^(R) ³ K_(ir2)=K, R₂≤ir2≤R₃, 1≤R₂≤R₃≤R_(re), and ir2, R₂ and R₃ are integers; or selecting K_(ir3) indices from the R₄-th, (R₄+1)-th, . . . , R_(re)-th rows of M_(re), where Σ_(ir3=R) ₄ ^(R) ^(re) K_(p)=K, 1≤R₄≤R_(re), and ir3 and R₄ are integers.

In an embodiment of the present disclosure, the operation of selecting the predetermined number of indices from M_(re) diagonal by diagonal includes at least one of: selecting K_(id1) indices from the (−min(R_(re), C_(re))+1)-th, (−min(R_(re), C_(re))+2)-th, . . . , D₁-th diagonals of M_(re), where Σ_(id1=−min(R) _(re) _(, C) _(re) ₎₊₁ ^(D) ¹ K_(id1)=K, −min(R_(re), C_(re))+1≤D₁≤max(R_(re), C_(re))−1, and id1 and D₁ are integers; selecting K_(id2) indices from the D₂-th, (D₂+1)-th, . . . , D₃-th diagonals of M_(re), where Σ_(id2=D) ₂₁ ^(D) ³ K_(id2)=K, −min(R_(re), C_(re))+1≤D₂≤D₃≤max(R_(re), C_(re))−1, and id2, D₂ and D₃ are integers; and selecting K_(id3) indices from the D₄-th, (D₄+1)-th, . . . , (max(R_(re), C_(re))−1)-th diagonals of M_(re), where

${{{\sum_{{{id}\; 3} = D_{4}}^{{\max{({R_{re},C_{re}})}} - 1}K_{{id}\; 3}} = K},}\;$ −min(R_(re), C_(re))+1≤D₄≤max(R_(re), C_(re))−1, and id3 and D₄ are integers, where min(R_(re), C_(re)) denotes the smaller of R_(re) and C_(re), and max(R_(re), C_(re)) denotes the larger of R_(re) and C_(re).

It is to be noted that, for a matrix M as an example, if M is a square matrix, the number, cc, of its columns is equal to the number, rr, of its rows. If the 0-th diagonal is the primary diagonal, the diagonals parallel with the primary diagonal are the 1^(st), 2^(nd), . . . , (rr−1)-th diagonals from the bottom up, and the diagonals parallel with the primary diagonal are the −1^(st), −2^(nd), . . . , (−rr+1)-th diagonals from the top down. If the 0-th diagonal is the secondary diagonal, the diagonals parallel with the secondary diagonal are the 1^(st), 2^(nd), . . . , (rr−1)-th diagonals from the bottom up, and the diagonals parallel with the secondary diagonal are the −1^(st), −2^(nd), . . . , (−rr+1)-th diagonals from the top down.

It is to be noted that, for a matrix M as an example, if M is not a square matrix, the number, cc, of its columns can be larger than the number, rr, of its rows. For the matrix

$\quad\begin{pmatrix} a_{1,1} & a_{1,2} & \ldots & a_{1,{cc}} \\ a_{2,1} & a_{2,2} & \ldots & a_{2,{cc}} \\ \vdots & \vdots & \ddots & \vdots \\ a_{{rr},1} & a_{{rr},2} & \ldots & a_{{rr},{cc}} \end{pmatrix}$ as an example, if the 0-th diagonal is along the line connecting the element a_(1,cc) and a_(rr,cc-rr+1), the diagonals parallel with the 0-th diagonal are the 1^(st), 2^(nd), . . . , (rr−1)-th diagonals from the bottom up, and the diagonals parallel with the 0-th diagonal are the −1^(st), −2^(nd), . . . , (−rr+1)-th diagonals from the top down. If the 0-th diagonal is along the line connecting the element a_(1,1) and a_(rr,rr), the diagonals parallel with the 0-th diagonal are the 1^(st), 2^(nd), . . . , (rr−1)-th diagonals from the bottom up, and the diagonals parallel with the 0-th diagonal are the −1^(st), −2^(nd), . . . , (−rr+1)-th diagonals from the top down.

It is to be noted that, for a matrix M as an example, if M is not a square matrix, the number, rr, of its rows can be larger than the number, cc, of its columns. For the matrix

$\quad\begin{pmatrix} a_{1,1} & a_{1,2} & \ldots & a_{1,{cc}} \\ a_{2,1} & a_{2,2} & \ldots & a_{2,{cc}} \\ \vdots & \vdots & \ddots & \vdots \\ a_{{rr},1} & a_{{rr},2} & \ldots & a_{{rr},{cc}} \end{pmatrix}$ as an example, if the 0-th diagonal is along the line connecting the element a_(rr,1) and a_(rr-cc+1,cc), the diagonals parallel with the 0-th diagonal are the 1^(st), 2^(nd), . . . , (rr−1)-th diagonals from the bottom up, and the diagonals parallel with the 0-th diagonal are the (−1)^(st), (−2)^(nd), . . . , (−rr+1)-th diagonals from the top down. If the 0-th diagonal is along the line connecting the element a_(rr-cc+1,1) and a_(rr,cc), the diagonals parallel with the 0-th diagonal are the 1^(st)2^(nd), . . . , (rr−1)-th diagonals from the bottom up, and the diagonals parallel with the 0-th diagonal are the −1^(st), −2^(nd), . . . , (−rr+1)-th diagonals from the top down.

It is to be noted that, when the predetermined number of indices are selected from M_(re) row by row, column by column or diagonal by diagonal, each index corresponding to a non-transmitted bit sequence in a second bit sequence matrix is skipped. The second bit sequence matrix is obtained from a first bit sequence matrix by using a second predetermined transform. The first bit sequence matrix is formed from the Polar encoded bit sequence. The second predetermined transform includes row permutation or column permutation.

It is to be noted that, if the encoded bit sequence is {x₀, x₁, x₂, . . . , x₁₅} and the bit sequence to be transmitted is {x₆, x₇, . . . , x₁₅)}, then the indices corresponding to the non-transmitted bit sequence are {0, 1, 2, . . . , 5}. In this case, when the indices in M_index are selected based on M_(re), the indices {0, 1, 2, . . . , 5} are to be skipped.

It is to be noted that the operation of selecting T bits based on the second bit sequence matrix as the bit sequence to be transmitted includes: selecting T bits based on the second bit sequence matrix row by row, column by column or diagonal by diagonal, as the bit sequence to be transmitted.

It is to be noted that the operation of selecting T bits based on the second bit sequence matrix row by row, column by column or diagonal by diagonal as the bit sequence to be transmitted includes: selecting T bits based on the second bit sequence matrix row by row, column by column or diagonal by diagonal, from a starting position t in the second bit sequence matrix. When the selection reaches the first or last bit in the second bit sequence matrix, it continues with the last or first bit in the second bit sequence matrix, where 1≤t≤R_(vb)×C_(vb).

It is to be noted that the operation of selecting T bits based on the second bit sequence matrix row by row, column by column or diagonal by diagonal as the bit sequence to be transmitted includes: selecting the 1^(st) to T-th bits or the (N−T+1)-th to N-th bits from the second bit sequence matrix column by column, when T is smaller than or equal to a length N of the Polar encoded bit sequence; selecting the 1^(st) to T-th bits or the (N−T+1)-th to N-th bits from the second bit sequence matrix row by row, when T is smaller than or equal to the length N of the Polar encoded bit sequence; selecting the 1^(st) to T-th bits or the (N−T+1)-th to N-th bits from the second bit sequence matrix diagonal by diagonal, when T is smaller than or equal to the length N of the Polar encoded bit sequence; selecting, when T is larger than the length N of the Polar encoded bit sequence, T bits row by row, column by column or diagonal by diagonal, from the t-th bit in the second bit sequence matrix. When the selection reaches the first or last bit in the second bit sequence matrix, it continues with the last or first bit in the second bit sequence matrix, where 1≤t≤R_(vb)×C_(vb) and N is a non-negative integer.

It is to be noted that the operation of selecting T bits from the second bit sequence matrix column by column includes at least one of: selecting T_(ie1) bits from the 1^(st), 2^(nd), . . . , E₁-th columns, where Σ_(ie1=1) ^(E) ¹ T_(ie1)=T, 1≤E₁≤C_(vb), and ie1 and E₁ are integers; selecting T_(ie2) bits from the E₂-th, (E₂+1)-th, . . . , E₃-th columns, where Σ_(ie2=E) ₂ ^(E) ³ T_(ie2)=T, 1≤E₂≤E₃≤C_(re), and ie2, E₂ and E₃ are integers; or selecting T_(ie3) bits from the E₄-th, (E₄+1)-th, . . . , E_(vb)-th columns, where Σ_(ie3=E) ₄ ^(C) ^(vb) T_(ie3)=T, 1≤E₄≤C_(vb), and ie3 and E₄ are integers.

It is to be noted that the operation of selecting T bits from the second bit sequence matrix row by row includes at least one of: selecting Tin bits from the 1^(st), 2^(nd), . . . , F₁-th rows, where Σ_(if1=1) ^(F) ¹ T_(if1)=T, 1≤F≤R_(vb), and if1 and F₁ are integers; selecting T_(if2) bits from the F₂-th, (F₂+1)-th, . . . , F₃-th rows, where Σ_(if2=F) ₂ ^(F) ³ T_(if2)=T, 1≤F₂≤F₃≤R_(vb), and if2, F₂ and F₃ are integers; or selecting T_(if3) bits from the F₄-th, (F₄+1)-th, . . . , R_(vb)-th rows, where Σ_(if3=F) ₄ ^(R) ^(vb) T_(if3)=T, 1≤F₄≤R_(vb), and if3 and F₄ are integers.

It is to be noted that the operation of selecting T bits from the second bit sequence matrix diagonal by diagonal includes at least one of: selecting T_(ig1) bits from the (−min(R_(vb), C_(vb))+1)-th, (−min(R_(vb), C_(vb))+2)-th, . . . , G₁-th diagonals, where Σ_(ig1=−min(R) _(vb) _(, C) _(vb) ₎₊₁ ^(G) ¹ T_(ig1)=T, −min(R_(vb), C_(vb))+≤G₁≤max(R_(vb), C_(vb))−1, and ig1 and G₁ are integers; selecting K_(ig2) bits from the G₂-th, (G₂+1)-th, . . . , G₃-th diagonals, where Σ_(ig2=G) ₂ ^(G) ³ T_(ig2)=T, −min(R_(vb), C_(vb))+1≤G₂≤G₃≤max(R_(vb), C_(vb))−1, and ig2, G₂ and G₃ are integers; or selecting K_(id3) bits from the G₄-th, (G₄+1)-th, . . . , (max(R_(vb), C_(vb))−1)-th diagonals, where

${{{\sum_{{{ig}\; 3} = G_{4}}^{{\max{({R_{vb},C_{vb}})}} - 1}T_{{ig}\; 3}} = T},}\;$ −min(R_(vb), C_(vb))+1≤G₄≤max(R_(vb), C_(vb))−1, and ig3 and G₄ are integers.

In an example, the bit sequence in M_(vb) can be arranged as

$M_{vb} = {\begin{bmatrix} y_{0} & y_{1} & y_{2} & y_{3} \\ y_{4} & y_{5} & y_{6} & y_{7} \\ y_{8} & y_{9} & y_{10} & y_{11} \\ y_{12} & y_{13} & y_{14} & y_{15} \end{bmatrix}.}$ Let T=9, when the first 9 bits are selected row by row to form the bit sequence to be transmitted, {y₀, y₁, y₂, y₃, y₄, y₅, y₆, y₇, y₈} are selected to form the bit sequence to be transmitted. When the first 9 bits are selected column by column to form the bit sequence to be transmitted, {y₀, y₄, y₈, y₁₂, y₁, y₅, y₉, y₁₃, y₂} are selected to form the bit sequence to be transmitted. When the first 9 bits are selected diagonal by diagonal to form the bit sequence to be transmitted, {y₀, y₁, y₄, y₂, y₅, y₈, y₃, y₆, y₉} are selected to form the bit sequence to be transmitted. When the last 9 bits are selected row by row to form the bit sequence to be transmitted, {y₇, y₈, y₉, y₁₀, y₁₁, y₁₂, y₁₃, y₁₄, y₁₅} are selected to form the bit sequence to be transmitted. When the last 9 bits are selected column by column to form the bit sequence to be transmitted, {y₁₃, y₂, y₆, y₁₀, y₁₄, y₃, y₇, y₁₁, y₁₅} are selected to form the bit sequence to be transmitted. When the last 9 bits are selected diagonal by diagonal to form the bit sequence to be transmitted, {y₆, y₉, y₁₂, y₇, y₁₀, y₁₃, y₁₁, y₁₄, y₁₅} are selected to form the bit sequence to be transmitted. During the selection in order, when the selection reaches the last bit y₁₅ in M_(vb), it continues with the first bit y₀ in M_(vb). During the selection in reverse order, when the selection reaches the first bit y₀ in M_(vb), it continues with the last bit y₁₅ in M_(vb).

It is to be noted that the above steps can be, but not limited to be, performed by a base station or a terminal.

With the description of the above embodiments, it will be apparent to those skilled in the art that the method according to the above embodiments can be implemented by means of software plus a necessary general-purpose hardware platform. Of course it can be implemented in hardware, but in many cases the former is the optimal implementation. Based on this understanding, the technical solution of the present disclosure in essence, or parts thereof contributive to the prior art, can be embodied in the form of a software product. The computer software product can be stored in a storage medium (e.g., ROM/RAM, magnetic disk, or optical disc) and includes instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method described in the various embodiments of the present disclosure.

Embodiment 2

According to an embodiment of the present disclosure, an apparatus for sequence determination is also provided. The apparatus can be applied in a first station for implementing the above embodiments and examples (details thereof will be omitted here). As used hereinafter, the term “module” can be software, hardware, or a combination thereof, capable of performing a predetermined function. While the apparatuses to be described in the following embodiments can be implemented in software, it can be contemplated that they can also be implemented in hardware or a combination of software and hardware.

FIG. 3 is a block diagram showing a structure of an apparatus for sequence determination according to an embodiment of the present disclosure. As shown in FIG. 3, the apparatus includes:

a permuting module 32 configured to map a first bit sequence having a length of K bits to a specified position based on M_index to obtain a second bit sequence;

an encoding module 34 coupled to the above permuting module 32 and configured to apply Polar encoding to the second bit sequence to obtain a Polar encoded bit sequence; and

a selecting module 36 coupled to the above encoding module 34 and configured to select T bits based on the Polar encoded bit sequence as a bit sequence to be transmitted, where K and T are both non-negative integers and K≤T.

With the above apparatus, a first bit sequence having a length of K bits is mapped to a specified position based on M_index to obtain a second bit sequence. Polar encoding is applied to the second bit sequence to obtain a Polar encoded bit sequence. T bits are selected based on the Polar encoded bit sequence as a bit sequence to be transmitted. That is, the present disclosure provides a method for determining a bit sequence to be transmitted, capable of solving the problem in the related art associated with lack of a sequence determination scheme in the 5G New RAT.

In an embodiment of the present disclosure, the above apparatus may further include: a first transform module coupled to the above permuting module 32 and configured to apply a first predetermined transform to a first index matrix to obtain a second index matrix and obtain M_index based on the second index matrix. The first predetermined transform includes row permutation or column permutation. That is, in the Polar encoding process, the same transform pattern is applied to one dimension of the first index matrix, such that only the other dimension of the first index matrix needs to be changed when a mother code length changes. Thus, the hardware can be reused in the implementation of Polar codes, thereby solving the problem in the related art associated with incapability of hardware reuse in the Polar encoding process.

In an embodiment of the present disclosure, the apparatus may further include: a second transform module configured to form a first bit sequence matrix from the Polar encoded bit sequence, and apply a second predetermined transform to the first bit sequence matrix to obtain a second bit sequence matrix. The second predetermined transform includes row permutation or column permutation. The selecting module is further configured to select T bits based on the second bit sequence matrix as the bit sequence to be transmitted. That is, the same transform pattern is applied to one dimension of the first bit sequence matrix, such that only the other dimension of the first bit sequence matrix needs to be changed when a mother code length changes. Thus, the hardware can be further reused in the implementation of Polar codes, thereby further solving the problem in the related art associated with incapability of hardware reuse in the Polar encoding process.

It is to be noted that the above apparatus may further include a storage module coupled to the above first transform module and configured to store the second bit sequence matrix.

It is to be noted that the above storage module can be, but not limited to, a buffer or any other memory, such as an internal memory or any other logic entity.

It is to be noted that the above first index matrix can be, but not limited to, a two dimensional, three dimensional or multi-dimensional matrix. In an example where the above first index matrix is a two dimensional matrix, the above first predetermined transform can be embodied such that a row transform pattern or a column transform pattern for the first index matrix is the same.

In an example where the above first index matrix is a two dimensional matrix, in an embodiment of the present disclosure, the second index matrix is M_(re), which is a matrix of R_(re) rows and C_(re) columns. The first index matrix is M_(or), which is:

$M_{or} = {\begin{bmatrix} 0 & 1 & 2 & \ldots & {C_{re} - 1} \\ C_{re} & {C_{re} + 1} & {C_{re} + 2} & \ldots & {{2C_{re}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ {\left( {R_{re} - 1} \right) \times C_{re}} & {{\left( {R_{re} - 1} \right) \times C_{re}} + 1} & {{\left( {R_{re} - 1} \right) \times C_{re}} + 2} & \ldots & {{R_{re} \times C_{re}} - 1} \end{bmatrix}\mspace{14mu}{or}}$ ${M_{or} = \begin{bmatrix} 0 & R_{re} & {2R_{re}} & \ldots & {\left( {C_{re} - 1} \right) \times R_{re}} \\ 1 & {R_{re} + 1} & {{2R_{re}} + 1} & \ldots & {{\left( {C_{re} - 1} \right) \times R_{re}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ {R_{re} - 1} & {{2R_{re}} - 1} & {{3R_{re}} - 1} & \ldots & {{R_{re} \times C_{re}} - 1} \end{bmatrix}},$ where R_(re)×C_(re)≥N, R_(re) and C_(re) are both non-negative integers, and N is a length of the Polar encoded bit sequence.

It is to be noted that when R_(re) is constant, C_(re) is a minimum value satisfying R_(re)×C_(re)≥N; or when C_(re) is constant, R_(re) is a minimum value satisfying R_(re)×C_(re)≥N.

It is to be noted that the above first transform module is further configured to obtain the second index matrix according to at least one of: the i-th column of M_(re) being obtained from the π₁(i)-th column of M_(or) by means of column permutation, where 0≤i≤C_(re)−1, 0≤π₁(i)≤C_(re)−1, R_(re)×C_(re)≥N, and i and π₁(i) are both non-negative integers; or the j-th row of M_(re) being obtained from the π₂(j)-th row of M_(or), where 0≤j≤R_(re)−1, 0≤π₂(j)≤R_(re)−1, R_(re)×C_(re)≥N, and j and π₂(j) are both non-negative integers.

It is to be noted that the above π₁(i) can be obtained according to at least one of:

Scheme 1: π₁(i)=BRO(i), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number i into a first binary number (B_(n1-1), B_(n1-2), . . . , B₀), reversing the first binary number to obtain a second binary number (B₀, B₁, . . . , B_(n1-1)) and converting the second binary number into a decimal number π₁(i), where n1=log₂(C_(re)) and 0≤i≤C_(re)−1;

Scheme 2: π₁(i)={S1, S2, S3}, where S1={0, 1, . . . , i1−1}, S2={i2, i3, i2+1, i3+1, . . . , i4, i5}, and S3 is a set of elements in {0, 1, . . . , C_(re)−1} other than those included in S1 and S2, where C_(re)/8≤i1≤i2≤C_(re)/3, i2≤i4≤i3≤2C_(re)/3, i3≤i5≤C_(re)−1, i1, i2, i3, i4 and i5 are all non- negative integers, and an intersection of any two of S1, S2 and S3 is null; or

Scheme 3: π₁(i)={I}, where {I} is a sequence obtained by organizing numerical results of applying a function f(r) to column indices r of M_(or) in ascending or descending order, where 0≤r≤C_(re)−1.

The above three schemes will be explained with reference to the following examples.

For Scheme 1, if C_(re)=8, i=6, then n1=log₂(8)=3. i=6 is converted into a binary number (B₂, B₁, B₀)=(1, 1, 0). The binary number (B₂, B₁, B₀)=(1, 1, 0) is reversed to obtain (B₀, B 1, B₂)=(0, 1, 1). (B₀, B₁, B₂)=(0, 1, 1) is then converted into a decimal number π₁(i)=3.

For Scheme 2, if C_(re)=8, i₁=2, i₂=2, i₃=4, i₄=3 and i₅=5, then S1={0, 1}, S2={2, 4, 3, 5}, S3={6, 7}, and π₁(i)={0, 1, 2, 4, 3, 5, 6, 7}.

For Scheme 3, C_(re)=8, {f(0), . . . , f(7)}={0, 1, 1.18, 2.18, 1.41, 2.41, 2.60, 3.60}. f(0), . . . , f(7) is organized in ascending order to obtain π₁(i)={1, 2, 3, 5, 4, 6, 7, 8}.

It is to be noted that f(r) includes at least one of:

${{f(r)} = {\sum_{{m\; 1} = 0}^{{n\; 1} - 1}{B_{m\; 1} \times 2^{\frac{m\; 1}{k}}}}},$ (B_(n1-1), B_(n1-2), . . . , B₀) is a binary representation of the index r, where 0≤m1≤n1−1, n1=log₂(C_(re)), and k is a non-negative integer (e.g., C_(re)=8, i=6, k=4, n1=log₂(8)=3, i=6 is converted into a binary number (B₂, B₁, B₀)=(1, 1, 0),

$\left. {{f(6)} = {{\sum_{{m\; 1} = 0}^{{n\; 1} - 1}{B_{m\; 1} \times 2^{\frac{m\; 1}{4}}}} = {{{0 \times 2^{\frac{0}{4}}} + {1 \times 2^{\frac{1}{4}}} + {1 \times 2^{\frac{2}{4}}}} = 2.4142}}} \right);$

initializing a function value corresponding to r as f₁ ^((r)), and obtaining a function value for each element f_(C) _(re) ^((r)) after n1-th iteration in accordance with a first iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 2}^{({{2r} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m\; 2}^{(r_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m\; 2}^{(r_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2m\; 2}^{({2r})} = {f_{m\; 2}^{(r_{1})} + f_{m\; 2}^{(r_{2})}}} \end{matrix},} \right.$ where f₁ ^((r)) is a mean log likelihood ratio (e.g., ≤(z) can be approximately:

${\varphi(z)} = \left\{ {\begin{matrix} {1 - {\frac{1}{\sqrt{4{\pi z}}}{\int_{- \infty}^{+ \infty}{\tanh\frac{u}{2}{\exp\left( {{- \left( {u - z} \right)^{2}}/\left( {4z} \right)} \right)}d\; u}}}} & {z > 0} \\ {1,} & {z = 0} \end{matrix},} \right.$ where the nodes i₁ and i₂ participating in the iterative calculation are dependent on the structure of the Polar encoder);

(Let the initial value f₁ ^((r))=2/σ², where σ² is the variance of noise, C_(re)=8, σ²=0. f₁ ^((r)) is substituted into the iteration equation to obtain f₂ ^((r)), which is then substituted into the iteration equation to obtain f₄ ^((r)), and so on, until f₈ ^((r)) is calculated, where f(r)=f₈ ^((r)), 0≤r≤C_(re)−1, {f(0), . . . , f(7)}={0.04, 0.41, 0.61, 3.29, 1.00, 4.56, 5.78, 16.00}); or

initializing a function value corresponding to r as f₁ ^((r)), and obtaining a function value for each element f_(C) _(re) ^((r)) after n1-th iteration in accordance with a second iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 3}^{({{2r} - 1})} = {f_{m\; 3}^{(r_{1})} + f_{m\; 3}^{(r_{2})} - {f_{m\; 3}^{(r_{1})}f_{m\; 3}^{(r_{2})}}}} \\ {f_{2m\; 3}^{({2r})} = {f_{m\; 3}^{(r_{1})}f_{m\; 3}^{(r_{2})}}} \end{matrix},} \right.$ where f₁ ^((r)) is mutual information, where 1≤m2≤n1, 1≤m3≤n1, and r1, r2, 2r and 2r−1 are all integers larger than or equal to 0 and smaller than or equal to C_(re)−1 (the nodes i₁ and i₂ participating in the iterative calculation are dependent on the structure of the Polar encoder);

(Let f₁ ^((r))=0.5 and C_(re)=8. f₁ ^((r)) is substituted into the iteration equation to obtain f₂ ^((r)), which is then substituted into the iteration equation to obtain f₄ ^((r)), and so on, until f₈ ^((r)) is calculated, where f(r)=f₈ ^((r)), 0≤i≤C_(re)−1, {f(0), . . . , f(7)}={0.008, 0.152, 0.221, 0.682, 0.313, 0.779, 0.850, 0.991}).

It is to be noted that the above π₂(j) can be obtained according to at least one of:

π₂(j)=BRO(j), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number j into a third binary number (B_(n2-1), B_(n2-2), . . . , B₀), reversing the third binary number to obtain a fourth binary number (B₀, B₁, . . . , B_(n2-1)) and converting the fourth binary number into a decimal number π₂(j), where n2=log₂(R_(re)) and 0≤j≤R_(re)−1;

π₂(j)={S4, S5, S6}, where S4={0, 1, . . . , j1−1}, S5={j2, j3, j2+1, j3+1, . . . , j4, j5}, and S6 is a set of elements in {0, 1, . . . , R_(re)−1} other than those included in S4 and S5, where R_(re)/8≤j1≤j2≤R_(re)/3, j2≤j4≤j3≤2 R_(re)/3, j3≤j5≤R_(re)−1, j1, j2, j3, j4 and j5 are all non- negative integers, and an intersection of any two of S4, S5 and S6 is null; or

π₂(j)={J}, where {J} is a sequence obtained by organizing numerical results of applying a function f(s) to row indices s of M_(or) in ascending or descending order, where 0≤s≤R_(re)−1.

It is to be noted that f(s) includes at least one of:

${{f(s)} = {\sum_{{m\; 4} = 0}^{{n\; 2} - 1}{B_{m\; 4} \times 2^{\frac{m\; 4}{k}}}}},$ (B_(n2-1), B_(n2-2), . . . , B₀) is a binary representation of the index s, where 0≤m4≤n2−1, n2=log₂(R_(re)), and k is a non-negative integer;

initializing a function value corresponding to s as f₁ ^((s)), and obtaining a function value for each element f_(R) _(re) ^((s)) e after n2-th iteration in accordance with a third iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 5}^{({{2s} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m\; 5}^{(s_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m\; 5}^{(s_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2m\; 5}^{({2s})} = {f_{m\; 5}^{(s_{1})} + f_{m\; 5}^{(s_{2})}}} \end{matrix},} \right.$ where f₁ ^((s)) is a mean log likelihood ratio; or

initializing a function value corresponding to s as f₁ ^((s)), and obtaining a function value for each element f_(R) _(re) ^((s)) after n2-th iteration in accordance with a fourth iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 6}^{({{2s} - 1})} = {f_{m\; 6}^{(s_{1})} + f_{m\; 6}^{(s_{2})} - {f_{m\; 6}^{(s_{1})}f_{m\; 6}^{(s_{2})}}}} \\ {f_{2m\; 6}^{({2s})} = {f_{m\; 6}^{(s_{1})}f_{m\; 6}^{(s_{2})}}} \end{matrix},} \right.$ where f₁ ^((s)) is mutual information, where 1≤m5≤n2, 1≤m6≤n2, s1, s2, 2s and 2s−1 are all integers larger than or equal to 0 and smaller than or equal to R_(re)−1.

It is to be noted that, for explanations for the above π₂(j), reference can be made to π₁(i).

It is to be noted that the above first bit sequence matrix can be, but not limited to, a two dimensional, three dimensional or multi-dimensional matrix. In an example where the above first bit sequence matrix is a two dimensional matrix, the above second predetermined transform can be embodied such that a row transform pattern or a column transform pattern for the first bit sequence matrix is the same.

It is to be noted that the first bit sequence matrix is M_(og). The second bit sequence matrix is M_(vb), which is a matrix of R_(vb) rows and C_(vb) columns. M_(og) is:

$M_{og} = {\begin{bmatrix} x_{0} & x_{1} & x_{2} & \ldots & x_{C_{vb} - 1} \\ x_{C_{vb}} & x_{C_{vb} + 1} & x_{C_{vb} + 2} & \ldots & x_{{2C_{vb}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{{({R_{vb} - 1})} \times C_{vb}} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 1} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 2} & \ldots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}\mspace{14mu}{or}}$ $\mspace{20mu}{{M_{og} = \begin{bmatrix} x_{0} & x_{R_{vb}} & x_{2R_{vb}} & \ldots & x_{{({C_{vb} - 1})} \times R_{vb}} \\ x_{1} & x_{R_{vb} + 1} & x_{{2R_{vb}} + 1} & \ldots & x_{{{({C_{vb} - 1})} \times R_{vb}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{R_{vb} - 1} & x_{{2R_{vb}} - 1} & x_{{3R_{vb}} - 1} & \ldots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}},}$ where x₀, x₁, x₂, . . . , x_(R) _(vb) _(×C) _(vb) ⁻¹ is the Polar encoded bit sequence, R_(vb)×C_(vb)≥N, R_(vb) and C_(vb) are both non-negative integers and N is a length of the Polar encoded bit sequence.

It is to be noted that when R_(vb) is constant, C_(vb) is a minimum value satisfying R_(vb)×C_(vb)≥N; or when C_(vb) is constant, R_(vb) is a minimum value satisfying R_(vb)×C_(vb)≥N.

It is to be noted that the above second transform module can further be configured to obtain the second bit sequence matrix according to at least one of: the g-th column of M_(vb) being obtained from the π₃(g)-th column of M_(og) by means of column permutation, where 0≤g≤C_(vb)−1, 0≤π₃(g)≤C_(vb)−1, R_(vb)×C_(vb)≥N, and g and π₃(g) are both non-negative integers; or the h-th row of M_(vb) being obtained from the π₄(h)-th row of M_(og) by means of row permutation, where 0≤h≤R_(vb)−1, 0≤π₄(h)≤R_(vb)−1, R_(vb)×C_(vb)≥N, and h and π₄(h) are both non-negative integers.

It is to be noted that π₃(g) can be obtained according to at least one of:

π₃(g)=BRO(g), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number g into a fifth binary number (B_(n3-1), B_(n3-2), . . . , B₀), reversing the fifth binary number to obtain a sixth binary number (B₀, B₁₁, . . . , B_(n3-1)) and converting the sixth binary number into a decimal number π₃(g), where n3=log₂(C_(vb)) and 0≤g≤C_(vb)−1;

π₃(g)={S1, S2, S3}, where S1={0, 1, . . . , g1−1}, S2={g2, g3, g2+1, g3+1, . . . , g4, g5}, and S3 is a set of elements in {0, 1, . . . , C_(vb)−1} other than those included in S1 and S2, where C_(vb)/8≤g1≤g2≤C_(vb)/3, g2≤g4≤g3≤2C_(vb)/3, g3≤g5≤C_(vb)−1, g1, g2, g3, g4 and g5 are all non- negative integers, and an intersection of any two of S1, S2 and S3 is null;

π₃(g)={G}, where {G} is a sequence obtained by organizing numerical results of applying a function f(α) to column indices α of M_(og) in ascending or descending order, where 0≤α≤C_(vb)−1;

π₃(g)={Q1, Q2, Q3}, where Q2={q1, q2, q1+1, q2+1, . . . , q3, q4}, 0≤q1≤q3≤(C_(vb)−1)/2, 0≤q2≤q4≤(C_(vb)−1)/2, q1, q2, q3, q4 and q5 are all non-negative integers, Q1 and Q3 are other elements in a difference set between {0, 1, . . . , C_(vb)−1} and Q2, and an intersection of any two of Q1, Q2 and Q3 is null;

π₃(g) being different from a predefined sequence V1 in nV1 positions, where V1=={0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 16, 13, 17, 14, 18, 15, 19, 20, 24, 21, 22, 25, 26, 28, 23, 27, 29, 30, 31}, 0≤nV1≤23; or

π₃(g) being different from a predefined sequence V2 in nV2 positions, where V2={0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31}, 0≤nV2≤3.

It is to be noted that f(α) includes at least one of:

${{f(\alpha)} = {\sum_{{m\; 6} = 0}^{{n\; 3} - 1}{B_{m\; 6} \times 2^{\frac{m\; 6}{k}}}}},$ (B_(n3-1), B_(n3-2), . . . , B₀) is a binary representation of the index α, where 0≤m6≤n3−1, n3=log₂(C_(vb)), and k is a non-negative integer;

initializing a function value corresponding to α as f₁ ^((α)), and obtaining a function value for each element f_(C) _(vb) ^((α)) after n3-th iteration in accordance with a fifth iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 7}^{({{2\alpha} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m\; 7}^{(\alpha_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m\; 7}^{(\alpha_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2m\; 7}^{({2\alpha})} = {f_{m\; 7}^{(\alpha_{1})} + f_{m\; 7}^{(\alpha_{2})}}} \end{matrix},} \right.$ where f₁ ^((α)) is a mean log likelihood ratio; or

initializing a function value corresponding to s as f₁ ^((α)), and obtaining a function value for each element f_(C) _(vb) ^((α)) after n3-th iteration in accordance with a sixth iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 8}^{({{2\alpha} - 1})} = {f_{m\; 8}^{(\alpha_{1})} + f_{m\; 8}^{(\alpha_{2})} - {f_{m\; 8}^{(\alpha_{1})}f_{m\; 8}^{(\alpha_{2})}}}} \\ {f_{2m\; 8}^{({2\alpha})} = {f_{m\; 8}^{(\alpha_{1})}f_{m\; 8}^{(\alpha_{2})}}} \end{matrix},} \right.$ where f₁ ^((α)) is mutual information, where 1≤m7≤n3, 1≤m8≤n3, and α1, α2, 2α and 2α−1 are all integers larger than or equal to 0 and smaller than or equal to C_(vb)−1.

It is to be noted that π₄(h) can be obtained according to at least one of:

π₄(h)=BRO(h), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number h into a seventh binary number (B_(n4-1), B_(n4-2), . . . , B₀), reversing the seventh binary number to obtain an eighth binary number (B₀, B₁, . . . , B_(n4-1)) and converting the eighth binary number into a decimal number π₄(h), where n4=log₂(R_(vb)) and 0≤h≤R_(vb)−1;

π₄(h)={S4, S5, S6}, where S4={0, 1, . . . , h1−1}, S5={h2, h3, h2+1, h3+1, . . . , h4, h5}, and S6 is a set of elements in {0, 1, . . . , R_(vb)−1} other than those included in S4 and S5, where R_(vb)/8≤h1≤h2≤R_(vb)/3, h2≤h4≤h3≤2R_(vb)/3, h3≤h5≤R_(vb)−1, h1, h2, h3, h4 and h5 are all non- negative integers, and an intersection of any two of S4, S5 and S6 is null;

π₄(h)={H}, where {H} is a sequence obtained by organizing numerical results of applying a function f(β) to row indices β of M_(og) in ascending or descending order, where 0≤O3≤R_(vb)−1;

π₄(h)={O1, O2, O3}, where O2={o1, o2, o1+1, o2+1, . . . , o3, o4}, 0≤o1≤o3≤(R_(vb)−1)/2, 0≤o2≤o4≤(R_(vb)−1)/2, o1, o2, o3, o4 and o5 are all non-negative integers, O1 and O3 are other elements in a difference set between {0, 1, . . . , R_(vb)−1} and O2, and an intersection of any two of O1, O2 and O3 is null;

π₄(h) being different from a predefined sequence VV1 in nVV1 positions, where VV1={0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 16, 13, 17, 14, 18, 15, 19, 20, 24, 21, 22, 25, 26, 28, 23, 27, 29, 30, 31}, 0≤nVV1≤23; or

π₄(h) being different from a predefined sequence VV2 in nVV2 positions, where VV2={0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31}, 0≤nVV2≤3.

It is to be noted that f(β) includes at least one of:

${{f(\beta)} = {\sum_{{m\; 9} = 0}^{{n\; 4} - 1}{B_{m\; 9} \times 2^{\frac{m\; 9}{k}}}}},$ (B_(n4-1), B_(n4-2), . . . , B₀) is a binary representation of the index β, where 0≤m9≤n4−1, n4=log₂(R_(vb)), and k is a non-negative integer;

initializing a function value corresponding to β as f₁ ^((β)), and obtaining a function value for each element f_(R) _(vb) ^((β)) after n4-th iteration in accordance with a seventh iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 10}^{({{2\beta} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m\; 10}^{(\beta_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m\; 10}^{(\beta_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2m\; 10}^{({2\beta})} = {f_{m\; 10}^{(\beta_{1})} + f_{m\; 10}^{(\beta_{2})}}} \end{matrix},} \right.$ where f₁ ^((β)) is a mean log likelihood ratio; or

initializing a function value corresponding to β as f₁ ^((β)), and obtaining a function value for each element f_(R) _(vb) ^((β)) after n4-th iteration in accordance with an eighth iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 11}^{({{2\beta} - 1})} = {f_{m\; 11}^{(\beta_{1})} + f_{m\; 11}^{(\beta_{2})} - {f_{m\; 11}^{(\beta_{1})}f_{m\; 11}^{(\beta_{2})}}}} \\ {f_{2m\; 11}^{({2\beta})} = {f_{m\; 11}^{(\beta_{1})}f_{m\; 11}^{(\beta_{2})}}} \end{matrix},} \right.$ where f₁ ^((β)) is mutual information, where 1≤m10≤n4, 1≤m11≤n4, and β1, β2, 2β and 2β−1 are all integers larger than or equal to 0 and smaller than or equal to R_(vb)−1.

It is to be noted that, for explanations for π₃(g) and π₄(h), reference can be made to π₁(i) and descriptions thereof will be omitted here.

In an embodiment of the present disclosure, the above first transform module can further be configured to select a predetermined number of indices based on M_(re) row by row, column by column or diagonal by diagonal, as M_index.

It is to be noted that the operation of selecting the predetermined number of indices from M_(re) column by column includes: selecting π_(p) indices from the p-th column of M_(re), where Σ_(p=1) ^(C) ^(re) K_(p)=K, p is an integer, and 1≤p≤C_(re). The operation of selecting the predetermined number of indices from M_(re) row by row includes: selecting π_(q) indices from the q-th row of M_(re), where Σ_(q=1) ^(R) ^(re) K_(q)=K, q is an integer, and 1≤q≤R_(re). The operation of selecting the predetermined number of indices from M_(re) diagonal by diagonal includes: selecting K_(δ) indices from the δ-th diagonal of M_(re), where

${{{\sum_{\delta = {{- {\min{({R_{re},C_{re}})}}} + 1}}^{{\max{({R_{re},C_{re}})}} - 1}K_{\delta}} = K},}\;$ δ is an integer, and −min(R_(re), C_(re))+1≤δ≤max(R_(re), C_(re))−1, where min(R_(re), C_(re)) denotes the smaller of R_(re) and C_(re), and max(R_(re), C_(re)) denotes the larger of R_(re) and C_(re).

It is to be noted that the operation of selecting the predetermined number of indices from M_(re) column by column includes at least one of: selecting K_(ic1) indices from the 1^(st), 2^(nd)C₁-th columns of M_(re), where Σ_(ic1=1) ^(C) ¹ K_(ic1)=K, 1≤ic1≤C₁, 1≤C₁≤C_(re), and ic1 and C₁ are integers; selecting K_(ic2) indices from the C₂-th, (C₂+1)-th, . . . , C₃-th columns of M_(re), where Σ_(ic2=C) ₂ ^(C) ³ K_(ic2)=K, C₂≤ic2≤C₃, 1≤C₂≤C₃≤C_(re), and ic2, C₂ and C₃ are integers; or selecting K_(ic3) indices from the C₄-th, (C₄+1)-th, . . . , C_(re)-th columns of M_(re), where Σ_(ic3=C) ₄ ^(C) ^(re) K_(ic3)=K, C₄≤ic3≤C_(re), 1≤C₄≤C_(re), and ic3 and C₄ are integers.

It is to be noted that the operation of selecting the predetermined number of indices from M_(re) row by row includes at least one of: selecting K_(ir1) indices from the 1^(st), 2^(nd), . . . , R₁-th rows of M_(re), where Σ_(ir1=1) ^(R) ¹ K_(ir1)=K, 1≤ir1≤R₁, 1≤R₁≤R_(re), and ir1 and R₁ are integers; selecting K_(ir2) indices from the R₂-th, (R₂+1)-th, . . . , R₃-th rows of M_(re), where Σ_(ir2=R) ₂ ^(R) ³ K_(ir2)=K, R₂≤ir2≤R₃, 1≤R₂≤R₃≤R_(re), and ir2, R₂ and R₃ are integers; or selecting K_(ir3) indices from the R₄-th, (R₄+1)-th, . . . R_(re)-th rows of M_(re), where Σ_(ir3=R) ₄ ^(R) ^(re) K_(p)=K, 1≤R₄R_(re), and ir3 and R₄ are integers.

It is to be noted that the operation of selecting the predetermined number of indices from M_(re) diagonal by diagonal includes at least one of: selecting K_(id1) indices from the (−min(R_(re), C_(re))+1)-th, (−min(R_(re), C_(re))+2)-th, . . . , D₁-th diagonals of M_(re), where Σ_(id1=−min(R) _(re) _(, C) _(re) ₎₊₁ ^(D) ¹ K_(id1)=K, −min(R_(re), C_(re))+1≤D₁≤max(R_(re), C_(re))−1, and id1 and D₁ are integers; selecting K_(id2) indices from the D₂-th, (D₂+1)-th, . . . , D₃-th diagonals of M_(re), where Σ_(id2=D) ₂₁ ^(D) ³ K_(id2)=K, −min(R_(re), C_(re))+1≤D₂≤D₃≤max(R_(re), C_(re))−1, and id2, D₂ and D₃ are integers; and selecting K_(id3) indices from the D₄-th, (D₄+1)-th, . . . , (max(R_(re), C_(re))−1)-th diagonals of M_(re), where

${{{\sum_{{{id}\; 3} = D_{4}}^{{\max{({R_{re},C_{re}})}} - 1}K_{{id}\; 3}} = K},}\;$ −min(R_(re), C_(re))+1≤D₄≤max(R_(re), C_(re))−1, and id3 and D₄ are integers, where min(R_(re), C_(re)) denotes the smaller of R_(re) and C_(re), and max(R_(re), C_(re)) denotes the larger of R_(re) and C_(re).

It is to be noted that, when the predetermined number of indices are selected from M_(re) row by row, column by column or diagonal by diagonal, each index corresponding to a non-transmitted bit sequence in a second bit sequence matrix is skipped. The second bit sequence matrix is obtained from a first bit sequence matrix by using a second predetermined transform. The first bit sequence matrix is formed from the Polar encoded bit sequence. The second predetermined transform includes row permutation or column permutation.

It is to be noted that the above selecting module 36 can further be configured to select T bits based on the second bit sequence matrix row by row, column by column or diagonal by diagonal, as the bit sequence to be transmitted.

It is to be noted that the above selecting module 36 can further be configured to select T bits from the second bit sequence matrix row by row, column by column or diagonal by diagonal, from a starting position t in the second bit sequence matrix. When the selection reaches the first or last bit in the second bit sequence matrix, it continues with the last or first bit in the second bit sequence matrix, where 1≤t≤R_(vb)×C_(vb).

It is to be noted that the above selecting module 36 can further be configured to select the 1^(st) to T-th bits or the (N−T+1)-th to N-th bits from the second bit sequence matrix column by column, when T is smaller than or equal to a length N of the Polar encoded bit sequence; select the 1^(st) to T-th bits or the (N−T+1)-th to N-th bits from the second bit sequence matrix row by row, when T is smaller than or equal to the length N of the Polar encoded bit sequence; select the 1^(st) to T-th bits or the (N−T+1)-th to N-th bits from the second bit sequence matrix diagonal by diagonal, when T is smaller than or equal to the length N of the Polar encoded bit sequence; select, when T is larger than the length N of the Polar encoded bit sequence, T bits row by row, column by column or diagonal by diagonal, from the t-th bit in the second bit sequence matrix. When the selection reaches the first or last bit in the second bit sequence matrix, it continues with the last or first bit in the second bit sequence matrix, where 1≤t≤R_(vb)×C_(vb) and N is a non-negative integer.

It is to be noted that the operation of selecting T bits from the second bit sequence matrix column by column includes at least one of: selecting T_(ie1) bits from the 1^(st), 2^(nd), . . . , E₁-th columns, where Σ_(ie1=1) ^(E) ¹ T_(ie1)=T, 1≤E₁≤C_(vb), and ie1 and E₁ are integers; selecting T_(ie2) bits from the E₂-th, (E₂+1)-th, . . . , E₃-th columns, where Σ_(ie2=E) ₂ ^(E) ³ T_(ie2)=T, 1≤E₂≤E₃≤C_(re), and ie2, E₂ and E₃ are integers; or selecting T_(ie3) bits from the E₄-th, (E₄+1)-th, . . . , E_(vb)-th columns, where Σ_(ie3=E) ₄ ^(C) ^(vb) T_(ie3)=T, 1≤E₄≤C_(vb), and ie3 and E₄ are integers.

It is to be noted that the operation of selecting T bits from the second bit sequence matrix row by row includes at least one of: selecting Tin bits from the 1^(st), 2^(nd), . . . , F₁-th rows, where Σ_(if1=1) ^(F) ¹ T_(if1)=T, 1≤F₁≤R_(vb), and if1 and F₁ are integers; selecting T_(if2) bits from the F₂-th, (F₂+1)-th, . . . , F₃-th rows, where Σ_(if2=F) ₂ ^(F) ³ T_(if2)=T, 1≤F₂F₃≤R_(vb), and if2, F₂ and F₃ are integers; or selecting T_(ir3) bits from the F₄-th, (F₄+1)-th, . . . , R_(vb)-th rows, where Σ_(if3=F) ₄ ^(R) ^(vb) T_(if3)=T, 1≤F₄≤R_(vb), and if3 and F₄ are integers.

It is to be noted that the operation of selecting T bits from the second bit sequence matrix diagonal by diagonal includes at least one of: selecting T_(ig1) bits from the (−min(R_(vb), C_(vb))+1)-th, (−min(R_(vb), C_(vb))+2)-th, . . . , G₁-th diagonals, where Σ_(ig1=−min(R) _(vb) _(, C) _(vb) ₎₊₁ ^(G) ¹ T_(ig1)=T, −min(R_(vb), C_(vb))+≤G₁≤max(R_(vb), C_(vb))−1, and ig1 and G₁ are integers; selecting K_(ig2) bits from the G₂-th, (G₂+1)-th, . . . , G₃-th diagonals, where Σ_(ig2=G) ₂ ^(G) ³ T_(ig2)=T, −min(R_(vb), C_(vb))+1≤G₂≤G₃≤max(R_(vb), C_(vb))−1, and ig2, G₂ and G₃ are integers; or selecting K_(id3) bits from the G₄-th, (G₄+1)-th, . . . , (max(R_(vb), C_(vb))−1)-th diagonals, where

${{{\sum_{{{ig}\; 3} = G_{4}}^{{\max{({R_{vb},C_{vb}})}} - 1}T_{{ig}\; 3}} = T},}\;$ −min(R_(vb), C_(vb))+1≤G₄≤max(R_(vb), C_(vb))−1, and ig3 and G₄ are integers.

It is to be noted that the above apparatus can be, but not limited to be, provided in a terminal or a network device such as a base station.

It should be noted that each of the above-described modules can be implemented by means of software or hardware, and the latter can be implemented in, but not limited to, the following manner: the above-described modules can be located at the same processor, or can be distributed over a plurality of processors in any combination.

Embodiment 3

Embodiment 3 of the present disclosure provides a device. FIG. 4 is a block diagram showing a structure of a device according to Embodiment 3 of the present disclosure. AS shown in FIG. 4, the device includes:

a processor 42 configured to: map a first bit sequence having a length of K bits to a specified position based on M_index to obtain a second bit sequence; apply Polar encoding to the second bit sequence to obtain a Polar encoded bit sequence; and select T bits based on the Polar encoded bit sequence as a bit sequence to be transmitted, where K and T are both non-negative integers and K≤T, and

a memory 44 coupled to the processor 42.

With the above device, a first bit sequence having a length of K bits is mapped to a specified position based on M_index to obtain a second bit sequence. Polar encoding is applied to the second bit sequence to obtain a Polar encoded bit sequence. T bits are selected based on the Polar encoded bit sequence as a bit sequence to be transmitted. That is, the present disclosure provides a method for determining a bit sequence to be transmitted, capable of solving the problem in the related art associated with lack of a sequence determination scheme in the 5G New RAT.

In an embodiment of the present disclosure, the above processor 42 can further be configured to: apply a first predetermined transform to a first index matrix to obtain a second index matrix; and obtain M_index based on the second index matrix. The first predetermined transform includes row permutation or column permutation. That is, in the Polar encoding process, the same transform pattern is applied to one dimension of the first index matrix, such that only the other dimension of the first index matrix needs to be changed when a mother code length changes. Thus, the hardware can be reused in the implementation of Polar codes, thereby solving the problem in the related art associated with incapability of hardware reuse in the Polar encoding process.

In an embodiment of the present disclosure, the above processor 42 can further be configured to: write the Polar encoded bit sequence into a first bit sequence matrix; and apply a second predetermined transform to the first bit sequence matrix to obtain a second bit sequence matrix. The second predetermined transform includes row permutation or column permutation. A selecting module is configured to select T bits based on the second bit sequence matrix as the bit sequence to be transmitted. That is, the same transform pattern is applied to one dimension of the first bit sequence matrix, such that only the other dimension of the first bit sequence matrix needs to be changed when a mother code length changes. Thus, the hardware can be further reused in the implementation of Polar codes, thereby further solving the problem in the related art associated with incapability of hardware reuse in the Polar encoding process.

It is to be noted that the above storage module can be configured to store the above second bit sequence matrix. The above storage module can be, but not limited to, a buffer or any other memory, such as an internal memory or any other logic entity.

It is to be noted that the above first index matrix can be, but not limited to, a two dimensional, three dimensional or multi-dimensional matrix. In an example where the above first index matrix is a two dimensional matrix, the above first predetermined transform can be embodied such that a row transform pattern or a column transform pattern for the first index matrix is the same.

In an example where the above first index matrix is a two dimensional matrix, in an embodiment of the present disclosure, the second index matrix is M_(re), which is a matrix of R_(re) rows and C_(re) columns. The first index matrix is M_(or), which is:

$M_{or} = {\begin{bmatrix} 0 & 1 & 2 & \ldots & {C_{re} - 1} \\ C_{re} & {C_{re} + 1} & {C_{re} + 2} & \ldots & {{2C_{re}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ {\left( {R_{re} - 1} \right) \times C_{re}} & {{\left( {R_{re} - 1} \right) \times C_{re}} + 1} & {{\left( {R_{re} - 1} \right) \times C_{re}} + 2} & \ldots & {{R_{re} \times C_{re}} - 1} \end{bmatrix}\mspace{14mu}{or}}$ ${M_{or} = \begin{bmatrix} 0 & R_{re} & {2R_{re}} & \ldots & {\left( {C_{re} - 1} \right) \times R_{re}} \\ 1 & {R_{re} + 1} & {{2R_{re}} + 1} & \ldots & {{\left( {C_{re} - 1} \right) \times R_{re}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ {R_{re} - 1} & {{2R_{re}} - 1} & {{3R_{re}} - 1} & \ldots & {{R_{re} \times C_{re}} - 1} \end{bmatrix}},$ where R_(re)×C_(re)≥N, R_(re) and C_(re) are both non-negative integers, and N is a length of the Polar encoded bit sequence.

It is to be noted that when R_(re) is constant, C_(re) is a minimum value satisfying R_(re)×C_(re)≥N; or when C_(re) is constant, R_(re) is a minimum value satisfying R_(re)×C_(re)≥N.

It is to be noted that the above processor 42 can further be configured to obtain the second index matrix according to at least one of: the i-th column of M_(re) being obtained from the π₁(i)-th column of M_(or) by means of column permutation, where 0≤i≤C_(re)−1, 0≤π₁(i)≤C_(re)−1, R_(re)×C_(re)≥N, and i and π₁(i) are both non-negative integers; or the j-th row of M_(re) being obtained from the π₂(j)-th row of M_(or), where 0≤j≤R_(re)−1, 0≤π2(j)≤R_(re)−1, R_(re)×C_(re)≥N, and j and π₂(j) are both non-negative integers.

It is to be noted that the above π₁(i) can be obtained according to at least one of:

Scheme 1: π₁(i)=BRO(i), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number i into a first binary number (B_(n1-1), B_(n1-2), . . . , B₀), reversing the first binary number to obtain a second binary number (B₀, B₁, . . . , B_(n1-1)) and converting the second binary number into a decimal number π₁(i), where n1=log₂(C_(re)) and 0≤i≤C_(re)−1;

Scheme 2: π₁(i)={S1, S2, S3}, where S1={0, 1, . . . , i1−1}, S2={i2, i3, i2+1, i3+1, . . . , i4, i5}, and S3 is a set of elements in {0, 1, . . . , C_(re)−1} other than those included in S1 and S2, where C_(re)/8≤i1≤i2≤C_(re)/3, i2≤i4≤i3≤2C_(re)/3, i3≤i5≤C_(re)−1, i1, i2, i3, i4 and i5 are all non- negative integers, and an intersection of any two of S1, S2 and S3 is null; or

Scheme 3: π₁(i)={I}, where {I} is a sequence obtained by organizing numerical results of applying a function f(r) to column indices r of M_(or) in ascending or descending order, where 0≤r≤C_(re)−1.

The above three schemes will be explained with reference to the following examples.

For Scheme 1, if C_(re)=8, i=6, then n1=log₂(8)=3. i=6 is converted into a binary number (B₂, B₁, B₀)=(1, 1, 0). The binary number (B₂, B₁, B₀)=(1, 1, 0) is reversed to obtain (B₀, B₁, B₂)=(0, 1, 1). (B₀, B₁, B₂)=(0, 1, 1) is then converted into a decimal number π₁(i)=3.

For Scheme 2, if C_(re)=8, i₁=2, i₂=2, i₃=4, i₄=3 and i₅=5, then S1={0, 1}, S2={2, 4, 3, 5}, S3={6, 7}, and π₁(i)={0, 1, 2, 4, 3, 5, 6, 7}.

For Scheme 3, C_(re)=8, {f(0), . . . , f(7)}={0, 1, 1.18, 2.18, 1.41, 2.41, 2.60, 3.60}. f(0), . . . , f(7) is organized in ascending order to obtain 1 i(i)={1, 2, 3, 5, 4, 6, 7, 8}.

It is to be noted that f(r) includes at least one of:

${{f(r)} = {\sum_{{m\; 1} = 0}^{{n\; 1} - 1}{B_{m\; 1} \times 2^{\frac{m\; 1}{k}}}}},$ (B_(n1-1), B_(n1-2), . . . , B₀) is a binary representation of the index r, where 0≤m1≤n1−1, n1=log₂(C_(re)), and k is a non-negative integer (e.g., C_(re)=8, i=6, k=4, n1=log₂(8)=3, i=6 is converted into a binary number (B₂, B₁, B₀)=(1, 1, 0),

$\left. {{f(6)} = {{\sum_{{m\; 1} = 0}^{{n\; 1} - 1}{B_{m\; 1} \times 2^{\frac{m\; 1}{4}}}} = {{{0 \times 2^{\frac{0}{4}}} + {1 \times 2^{\frac{1}{4}}} + {1 \times 2^{\frac{2}{4}}}} = 2.4142}}} \right);$

initializing a function value corresponding to r as f₁ ^((r)), and obtaining a function value for each element f_(C) _(re) ^((r)) after n1-th iteration in accordance with a first iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 2}^{({{2r} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m\; 2}^{(r_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m\; 2}^{(r_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2m\; 2}^{({2r})} = {f_{m\; 2}^{(r_{1})} + f_{m\; 2}^{(r_{2})}}} \end{matrix},} \right.$ where f₁ ^((r)) is a mean log likelihood ratio. (e.g., φ(z) can be approximately:

${\varphi(z)} = \left\{ {\begin{matrix} {1 - {\frac{1}{\sqrt{4{\pi z}}}{\int_{- \infty}^{+ \infty}{\tanh\frac{u}{2}{\exp\left( {{- \left( {u - z} \right)^{2}}/\left( {4z} \right)} \right)}d\; u}}}} & {z > 0} \\ {1,} & {z = 0} \end{matrix},} \right.$ where the nodes i₁ and i₂ participating in the iterative calculation are dependent on the structure of the Polar encoder);

(Let the initial value f₁ ^((r))=2/σ², where σ² is the variance of noise, C_(re)=8, σ²=0. f₁ ^((r)) is substituted into the iteration equation to obtain f₂ ^((r)), which is then substituted into the iteration equation to obtain f₄ ^((r)), and so on, until f₈ ^((r)) is calculated, where f(r)=f₈ ^((r)), 0≤r≤C_(re)−1, {f(0), . . . , f(7)}={0.04, 0.41, 0.61, 3.29, 1.00, 4.56, 5.78, 16.00}); or

initializing a function value corresponding to r as f₁ ^((r)), and obtaining a function value for each element f_(C) _(re) ^((r)) after n1-th iteration in accordance with a second iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 3}^{({{2r} - 1})} = {f_{m\; 3}^{(r_{1})} + f_{m\; 3}^{(r_{2})} - {f_{m\; 3}^{(r_{1})}f_{m\; 3}^{(r_{2})}}}} \\ {f_{2m\; 3}^{({2r})} = {f_{m\; 3}^{(r_{1})}f_{m\; 3}^{(r_{2})}}} \end{matrix},} \right.$ where f₁ ^((r)) is mutual information, where 1≤m2≤n1, 1≤m3≤n1, and r1, r2, 2r and 2r−1 are all integers larger than or equal to 0 and smaller than or equal to C_(re)−1 (the nodes i₁ and i₂ participating in the iterative calculation are dependent on the structure of the Polar encoder);

(Let f₁ ^((r))=0.5 and C_(re)=8. f₁ ^((r)) is substituted into the iteration equation to obtain f₂ ^((r)), which is then substituted into the iteration equation to obtain f₄ ^((r)), and so on, until f₈ ^((r)) is calculated, where f(r)=f₈ ^((r)), 0≤i≤C_(re)−1, {f(0), . . . , f(7)}={0.008, 0.152, 0.221, 0.682, 0.313, 0.779, 0.850, 0.991}).

It is to be noted that the above π₂(j) can be obtained according to at least one of:

π₂(j)=BRO(j), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number j into a third binary number (B_(n2-1), B_(n2-2), . . . , B₀), reversing the third binary number to obtain a fourth binary number (B₀, B₁, . . . , B_(n2-1)) and converting the fourth binary number into a decimal number π₂(j), where n2=log₂(R_(re)) and 0≤j≤R_(re)−1;

π₂(j)={S4, S5, S6}, where S4={0, 1, . . . , j1−1}, S5={j2, j3, j2+1, j3+1, . . . , j4, j5}, and S6 is a set of elements in {0, 1, . . . , R_(re)−1} other than those included in S4 and S5, where R_(re)/8≤j1≤j2≤R_(re)/3, j2≤j4≤j3≤2 R_(re)/3, j3≤j5≤R_(re)−1, j1, j2, j3, j4 and j5 are all non- negative integers, and an intersection of any two of S4, S5 and S6 is null; or

π₂(j)={J}, where {J} is a sequence obtained by organizing numerical results of applying a function f(s) to row indices s of M_(or) in ascending or descending order, where 0≤s≤R_(re)−1.

It is to be noted that f(s) includes at least one of:

${{f(s)} = {\sum_{{m\; 4} = 0}^{{n\; 2} - 1}{B_{m\; 4} \times 2^{\frac{m\; 4}{k}}}}},$ (B_(n2-1), B_(n2-2), . . . , B₀) is a binary representation of the index s, where 0≤m4≤n2−1, n2=log₂(R_(re)), and k is a non-negative integer;

initializing a function value corresponding to s as f₁ ^((s)), and obtaining a function value for each element f_(R) _(re) ^((s)) after n2-th iteration in accordance with a third iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 5}^{({{2s} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m\; 5}^{(s_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m\; 5}^{(s_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2m\; 5}^{({2s})} = {f_{m\; 5}^{(s_{1})} + f_{m\; 5}^{(s_{2})}}} \end{matrix},} \right.$ where f₁ ^((s)) is a mean log likelihood ratio; or

initializing a function value corresponding to s as f₁ ^((s)), and obtaining a function value for each element f_(R) _(re) ^((s)) after n2-th iteration in accordance with a fourth iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 6}^{({{2s} - 1})} = {f_{m\; 6}^{(s_{1})} + f_{m\; 6}^{(s_{2})} - {f_{m\; 6}^{(s_{1})}f_{m\; 6}^{(s_{2})}}}} \\ {f_{2m\; 6}^{({2s})} = {f_{m\; 6}^{(s_{1})}f_{m\; 6}^{(s_{2})}}} \end{matrix},} \right.$ where f₁ ^((s)) is mutual information, where 1≤m5≤n2, 1≤m6≤n2, s1, s2, 2s and 2s−1 are all integers larger than or equal to 0 and smaller than or equal to R_(re)−1.

It is to be noted that, for explanations for the above π₂(j), reference can be made to π₁(i).

It is to be noted that the above first bit sequence matrix can be, but not limited to, a two dimensional, three dimensional or multi-dimensional matrix. In an example where the above first bit sequence matrix is a two dimensional matrix, the above second predetermined transform can be embodied such that a row transform pattern or a column transform pattern for the first bit sequence matrix is the same.

It is to be noted that the first bit sequence matrix is M_(og). The second bit sequence matrix is M_(vb), which is a matrix of R_(vb) rows and C_(vb) columns. M_(og) is:

$M_{og} = {\begin{bmatrix} x_{0} & x_{1} & x_{2} & \ldots & x_{C_{vb} - 1} \\ x_{C_{vb}} & x_{C_{vb} + 1} & x_{C_{vb} + 2} & \ldots & x_{{2C_{vb}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{{({R_{vb} - 1})} \times C_{vb}} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 1} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 2} & \ldots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}\mspace{14mu}{or}}$ $\mspace{20mu}{{M_{og} = \begin{bmatrix} x_{0} & x_{R_{vb}} & x_{2R_{vb}} & \ldots & x_{{({C_{vb} - 1})} \times R_{vb}} \\ x_{1} & x_{R_{vb} + 1} & x_{{2R_{vb}} + 1} & \ldots & x_{{{({C_{vb} - 1})} \times R_{vb}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{R_{vb} - 1} & x_{{2R_{vb}} - 1} & x_{{3R_{vb}} - 1} & \ldots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}},}$ where x₀, x₁, x₂, . . . , x_(R) _(vb) _(×C) _(vb) ⁻¹ is the Polar encoded bit sequence, R_(vb)×C_(vb)≥N, R_(vb) and C_(vb) are both non-negative integers and N is a length of the Polar encoded bit sequence.

It is to be noted that when R_(vb) is constant, C_(vb) is a minimum value satisfying R_(vb)×C_(vb)≥N; or when C_(vb) is constant, R_(vb) is a minimum value satisfying R_(vb)×C_(vb)≥N.

It is to be noted that the above processor 42 can further be configured to obtain the second bit sequence matrix according to at least one of: the g-th column of M_(vb) being obtained from the π₃(g)-th column of M_(og) by means of column permutation, where 0≤g≤C_(vb)−1, 0≤π₃(g)≤C_(vb)−1, R_(vb)×C_(vb)≥N, and g and π₃(g) are both non-negative integers; or the h-th row of M_(vb) being obtained from the π₄(h)-th row of M_(og) by means of row permutation, where 0≤h≤R_(vb)−1, 0≤π₄(h)≤R_(vb)−1, R_(vb)×C_(vb)≥N, and h and π₄(h) are both non-negative integers.

It is to be noted that π₃(g) can be obtained according to at least one of:

π₃(g)=BRO(g), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number g into a fifth binary number (B_(n3-1), B_(n3-2), . . . , B₀), reversing the fifth binary number to obtain a sixth binary number (B₀, B₁₁, . . . , B_(n3-1)) and converting the sixth binary number into a decimal number π₃(g), where n3=log₂(C_(vb)) and 0≤g≤C_(vb)−1;

π₃(g)={S1, S2, S3}, where S1={0, 1, . . . , g1−1}, S2={g2, g3, g2+1, g3+1, . . . , g4, g5}, and S3 is a set of elements in {0, 1, . . . , C_(vb)−1} other than those included in S1 and S2, where C_(vb)/8≤g1≤g2≤C_(vb)/3, g2≤g4≤g3≤2C_(vb)/3, g3≤g5≤C_(vb)−1, g1, g2, g3, g4 and g5 are all non- negative integers, and an intersection of any two of S1, S2 and S3 is null;

π₃(g)={G}, where {G} is a sequence obtained by organizing numerical results of applying a function f(α) to column indices α of M_(og) in ascending or descending order, where 0≤α≤C_(vb)−1;

π₃(g)={Q1, Q2, Q3}, where Q2={q1, q2, q1+1, q2+1, . . . , q3, q4}, 0≤q1≤q3≤(C_(vb)−1)/2, 0≤q2≤q4≤(C_(vb)−1)/2, q1, q2, q3, q4 and q5 are all non-negative integers, Q1 and Q3 are other elements in a difference set between {0, 1, . . . , C_(vb)−1} and Q2, and an intersection of any two of Q1, Q2 and Q3 is null;

π₃(g) being different from a predefined sequence V1 in nV1 positions, where V1={0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 16, 13, 17, 14, 18, 15, 19, 20, 24, 21, 22, 25, 26, 28, 23, 27, 29, 30, 31}, 0≤nV1≤23; or

π₃(g) being different from a predefined sequence V2 in nV2 positions, where V2={0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31}, 0≤nV2≤3.

It is to be noted that f(α) includes at least one of:

${{f(\alpha)} = {\sum_{{m\; 6} = 0}^{{n\; 3} - 1}{B_{m\; 6} \times 2^{\frac{m\; 6}{k}}}}},$ (B_(n3-1), B_(n3-2), . . . , B₀) is a binary representation of the index α, where 0≤m6≤n3−1, n3=log₂(C_(vb)), and k is a non-negative integer;

initializing a function value corresponding to α as f₁ ^((α)), and obtaining a function value for each element f_(C) _(vb) ^((α)) after n-th iteration in accordance with a fifth iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 7}^{({{2\alpha} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m\; 7}^{(\alpha_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m\; 7}^{(\alpha_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2m\; 7}^{({2\alpha})} = {f_{m\; 7}^{(\alpha_{1})} + f_{m\; 7}^{(\alpha_{2})}}} \end{matrix},} \right.$ where f₁ ^((α)) is a mean log likelihood ratio; or

initializing a function value corresponding to s as a), and obtaining a function value for each element f_(C) _(vb) ^((α)) after n3-th iteration in accordance with a sixth iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 8}^{({{2\alpha} - 1})} = {f_{m\; 8}^{(\alpha_{1})} + f_{m\; 8}^{(\alpha_{2})} - {f_{m\; 8}^{(\alpha_{1})}f_{m\; 8}^{(\alpha_{2})}}}} \\ {f_{2m\; 8}^{({2\alpha})} = {f_{m\; 8}^{(\alpha_{1})}f_{m\; 8}^{(\alpha_{2})}}} \end{matrix},} \right.$ where f₁ ^((α)) is mutual information, where 1≤m7≤n3, 1≤m8≤n3, and α1, α2, 2α and 2α−1 are all integers larger than or equal to 0 and smaller than or equal to C_(vb)−1.

It is to be noted that π₄(h) can be obtained according to at least one of:

π₄(h)=BRO(h), where BRO( ) denotes a bit reverse ordering operation which includes: converting a decimal number h into a seventh binary number (B_(n4-1), B_(n4-2), . . . , B₀), reversing the seventh binary number to obtain an eighth binary number (B₀, B₁, . . . , B_(n4-1)) and converting the eighth binary number into a decimal number π₄(h), where n4=log₂(R_(vb)) and 0≤h≤R_(vb)−1;

π₄(h)={S4, S5, S6}, where S4={0, 1, . . . , h1−1}, S5={h2, h3, h2+1, h3+1, . . . , h4, h5}, and S6 is a set of elements in {0, 1, . . . , R_(vb)−1} other than those included in S4 and S5, where R_(vb)/8≤h1≤h2≤R_(vb)/3, h2≤h4≤h3≤2R_(vb)/3, h3≤h5≤R_(vb)−1, h1, h2, h3, h4 and h5 are all non- negative integers, and an intersection of any two of S4, S5 and S6 is null;

π₄(h)={H}, where {H} is a sequence obtained by organizing numerical results of applying a function f(β) to row indices β of M_(og) in ascending or descending order, where 0≤3≤R_(vb)−1;

π₄(h)={O1, O2, O3}, where O2={o1, o2, o1+1, o2+1, . . . , o3, o4}, 0≤o1≤o3≤(R_(vb)−1)/2, 0≤o2≤o4≤(R_(vb)−1)/2, o1, o2, o3, o4 and o5 are all non-negative integers, O1 and O3 are other elements in a difference set between {0, 1, . . . , R_(vb)−1} and O2, and an intersection of any two of O1, O2 and O3 is null;

π₄(h) being different from a predefined sequence VV1 in nVV1 positions, where VV1={0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 16, 13, 17, 14, 18, 15, 19, 20, 24, 21, 22, 25, 26, 28, 23, 27, 29, 30, 31}, 0≤nVV1≤23; or

π₄(h) being different from a predefined sequence VV2 in nVV2 positions, where VV2={0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31}, 0≤nVV2≤3.

It is to be noted that f(β) includes at least one of:

${{f(\beta)} = {\sum_{{m\; 9} = 0}^{{n\; 4} - 1}{B_{m\; 9} \times 2^{\frac{m\; 9}{k}}}}},$ (B_(n4-1), B_(n4-2), . . . , B₀) is a binary representation of the index β, where 0≤m9≤n4−1, n4=log₂(R_(vb)), and k is a non-negative integer;

initializing a function value corresponding to β as f₁ ^((β)), and obtaining a function value for each element f_(R) _(vb) ^((β)) after n4-th iteration in accordance with a seventh iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 10}^{({{2\beta} - 1})} = {\varphi^{- 1}\left( {1 - {\left\lbrack {1 - {\varphi\left( f_{m\; 10}^{(\beta_{1})} \right)}} \right\rbrack\left\lbrack {1 - {\varphi\left( f_{m\; 10}^{(\beta_{2})} \right)}} \right\rbrack}} \right)}} \\ {f_{2m\; 10}^{({2\beta})} = {f_{m\; 10}^{(\beta_{1})} + f_{m\; 10}^{(\beta_{2})}}} \end{matrix},} \right.$ where f₁ ^((β)) is a mean log likelihood ratio; or

initializing a function value corresponding to β as f₁ ^((β)), and obtaining a function value for each element f_(R) _(vb) ^((β)) after n4-th iteration in accordance with an eighth iteration equation:

$\left\{ {\begin{matrix} {f_{2m\; 11}^{({{2\beta} - 1})} = {f_{m\; 11}^{(\beta_{1})} + f_{m\; 11}^{(\beta_{2})} - {f_{m\; 11}^{(\beta_{1})}f_{m\; 11}^{(\beta_{2})}}}} \\ {f_{2m\; 11}^{({2\beta})} = {f_{m\; 11}^{(\beta_{1})}f_{m\; 11}^{(\beta_{2})}}} \end{matrix},} \right.$ where f₁ ^((β)) is mutual information, where 1≤m10≤n4, 1≤m11≤n4, and β1, β2, 2β and 2β−1 are all integers larger than or equal to 0 and smaller than or equal to R_(vb)−1.

It is to be noted that, for explanations for π₃(g) and π₄(h), reference can be made to π₁(i) and descriptions thereof will be omitted here.

In an embodiment of the present disclosure, the above first transform module can further be configured to select a predetermined number of indices based on M_(re) row by row, column by column or diagonal by diagonal, as M_index.

It is to be noted that the operation of selecting the predetermined number of indices from M_(re) column by column includes: selecting π_(p) indices from the p-th column of M_(re), where Σ_(p=1) ^(C) ^(re) K_(p)=K, p is an integer, and 1≤p≤C_(re). The operation of selecting the predetermined number of indices from M_(re) row by row includes: selecting π_(q) indices from the q-th row of M_(re), where Σ_(q=1) ^(R) ^(re) K_(q)=K, q is an integer, and 1≤q≤R_(re). The operation of selecting the predetermined number of indices from M_(re) diagonal by diagonal includes: selecting K_(δ) indices from the δ-th diagonal of M_(re), where

${{{\sum_{\delta = {{- {\min{({R_{re},C_{re}})}}} + 1}}^{{\max{({R_{re},C_{re}})}} - 1}K_{\delta}} = K},}\;$ δ is an integer, and −min(R_(re), C_(re))+≤6≤max(R_(re), C_(re))−1, where min(R_(re), C_(re)) denotes the smaller of R_(re) and C_(re), and max(R_(re), C_(re)) denotes the larger of R_(re) and C_(re).

It is to be noted that the operation of selecting the predetermined number of indices from M_(re) column by column includes at least one of: selecting K_(ic1) indices from the 1^(st), 2^(nd)C₁-th columns of M_(re), where Σ_(ic1=1) ^(C) ¹ K_(ic1)=K, 1≤ic1≤C₁, 1≤C≤C_(re), and ic1 and C₁ are integers; selecting K_(ic2) indices from the C₂-th, (C₂+1)-th, . . . , C₃-th columns of M_(re), where Σ_(ic2=C) ₂ ^(C) ³ K_(ic2)=K, C₂≤ic2≤C₃, 1≤C₂≤C₃≤C_(re), and ic2, C₂ and C₃ are integers; or selecting K_(ic3) indices from the C₄-th, (C₄+1)-th, . . . , C_(re)-th columns of M_(re), where Σ_(ic3=C) ₄ ^(C) ^(re) K_(ic3)=K, C₄≤ic3≤C_(re), 1≤C₄≤C_(re), and ic3 and C₄ are integers.

It is to be noted that the operation of selecting the predetermined number of indices from M_(re) row by row includes at least one of: selecting K_(ir1) indices from the 1^(st), 2^(nd), . . . , R₁-th rows of M_(re), where Σ_(ir1=1) ^(R) ¹ K_(ir1)=K, 1≤ir1≤R, 1≤R₁≤R_(re), and ir1 and R₁ are integers; selecting K_(ir2) indices from the R₂-th, (R₂+1)-th, . . . , R₃-th rows of M_(re), where Σ_(ir2=R) ₂ ^(R) ³ K_(ir2)=K, R₂≤ir2≤R₃, 1≤R₂≤R₃≤R_(re), and ir2, R₂ and R₃ are integers; or selecting K_(ir3) indices from the R₄-th, (R₄+1)-th, . . . , R_(re)-th rows of M_(re), where Σ_(ir3=R) ₄ ^(R) ^(re) K_(p)=K, 1≤R₄≤R_(re), and ir3 and R₄ are integers.

It is to be noted that the operation of selecting the predetermined number of indices from M_(re) diagonal by diagonal includes at least one of: selecting K_(id1) indices from the (−min(R_(re), C_(re))+1)-th, (−min(R_(re), C_(re))+2)-th, . . . , D₁-th diagonals of M_(re), where Σ_(id1=−min(R) _(re) _(, C) _(re) ₎₊₁ ^(D) ¹ K_(id1)=K, −min(R_(re), C_(re))+1≤D₁≤max(R_(re), C_(re))−1, and id1 and D₁ are integers; selecting K_(id2) indices from the D₂-th, (D₂+1)-th, . . . , D₃-th diagonals of M_(re), where Σ_(id2=D) ₂₁ ^(D) ³ K_(id2)=K, −min(R_(re), C_(re))+1≤D₂≤D₃≤max(R_(re), C_(re))−1, and id2, D₂ and D₃ are integers; and selecting K_(id3) indices from the D₄-th, (D₄+1)-th, . . . , (max(R_(re), C_(re))−1)-th diagonals of M_(re), where

${{{\sum_{{{id}\; 3} = D_{4}}^{{\max{({R_{re},C_{re}})}} - 1}K_{{id}\; 3}} = K},}\;$ −min(R_(re), C_(re))+1≤D₄≤max(R_(re), C_(re))−1, and id3 and D₄ are integers, where min(R_(re), C_(re)) denotes the smaller of R_(re) and C_(re), and max(R_(re), C_(re)) denotes the larger of R_(re) and C_(re).

It is to be noted that, when the predetermined number of indices are selected from M_(re) row by row, column by column or diagonal by diagonal, each index corresponding to a non-transmitted bit sequence in a second bit sequence matrix is skipped. The second bit sequence matrix is obtained from a first bit sequence matrix by using a second predetermined transform. The first bit sequence matrix is formed from the Polar encoded bit sequence. The second predetermined transform includes row permutation or column permutation.

It is to be noted that the above processor 42 can further be configured to select T bits based on the second bit sequence matrix row by row, column by column or diagonal by diagonal, as the bit sequence to be transmitted.

It is to be noted that the above processor 42 can further be configured to select T bits based on the second bit sequence matrix row by row, column by column or diagonal by diagonal, from a starting position t in the second bit sequence matrix. When the selection reaches the first or last bit in the second bit sequence matrix, it continues with the last or first bit in the second bit sequence matrix, where 1≤t≤R_(vb)×C_(vb).

It is to be noted that the above processor 42 can further be configured to select the 1^(st) to T-th bits or the (N−T+1)-th to N-th bits from the second bit sequence matrix column by column, when T is smaller than or equal to a length N of the Polar encoded bit sequence; select the 1^(st) to T-th bits or the (N−T+1)-th to N-th bits from the second bit sequence matrix row by row, when T is smaller than or equal to the length N of the Polar encoded bit sequence; select the 1^(st) to T-th bits or the (N−T+1)-th to N-th bits from the second bit sequence matrix diagonal by diagonal, when T is smaller than or equal to the length N of the Polar encoded bit sequence; select, when T is larger than the length N of the Polar encoded bit sequence, T bits row by row, column by column or diagonal by diagonal, from the t-th bit in the second bit sequence matrix. When the selection reaches the first or last bit in the second bit sequence matrix, it continues with the last or first bit in the second bit sequence matrix, where 1≤t≤R_(vb)×C_(vb) and N is a non-negative integer.

It is to be noted that the operation of selecting T bits from the second bit sequence matrix column by column includes at least one of: selecting T_(ie1) bits from the 1^(st), 2^(nd), . . . , E₁-th columns, where Σ_(ie1=1) ^(E) ¹ T_(ie1)=T, 1≤E₁≤C_(vb), and ie1 and E₁ are integers; selecting T_(ie2) bits from the E₂-th, (E₂+1)-th, . . . , E₃-th columns, where Σ_(ie2=E) ₂ ^(E) ³ T_(ie2)=T, 1≤E₂≤E₃≤C_(re), and ie2, E₂ and E₃ are integers; or selecting T_(ie3) bits from the E₄-th, (E₄+1)-th, . . . , E_(vb)-th columns, where Σ_(ie3=E) ₄ ^(C) ^(vb) T_(ie3)=T, 1≤E₄≤C_(vb), and ie3 and E₄ are integers.

It is to be noted that the operation of selecting T bits from the second bit sequence matrix row by row includes at least one of: selecting Tin bits from the 1^(st), 2^(nd), . . . , F₁-th rows, where Σ_(if1=1) ^(F) ¹ T_(if1)=T, 1≤F₁≤R_(vb), and if1 and F₁ are integers; selecting T_(if2) bits from the F₂-th, (F₂+1)-th, . . . , F₃-th rows, where Σ_(if2=F) ₂ ^(F) ³ T_(if2)=T, 1≤F₃≤R_(vb), and if2, F₂ and F₃ are integers; or selecting T_(if3) bits from the F₄-th, (F₄+1)-th, . . . , R_(vb)-th rows, where Σ_(if3=F) ₄ ^(R) ^(vb) T_(if3)=T, 1≤F₄R_(vb), and if3 and F₄ are integers.

It is to be noted that the operation of selecting T bits from the second bit sequence matrix diagonal by diagonal includes at least one of: selecting T_(ig1) bits from the (−min(R_(vb), C_(vb))+1)-th, (−min(R_(vb), C_(vb))+2)-th, . . . , G₁-th diagonals, where Σ_(ig1=−min(R) _(vb) _(, C) _(vb) ₎₊₁ ^(G) ¹ T_(ig1)=T, −min(R_(vb), C_(vb))+≤G₁≤max(R_(vb), C_(vb))−1, and ig1 and G₁ are integers; selecting K_(ig2) bits from the G₂-th, (G₂+1)-th, . . . , G₃-th diagonals, where Σ_(ig2=G) ₂ ^(G) ³ T_(ig2)=T, −min(R_(vb), C_(vb))+1≤G₂≤G₃≤max(R_(vb), C_(vb))−1, and ig2, G₂ and G₃ are integers; or selecting K_(id3) bits from the G₄-th, (G₄+1)-th, . . . , (max(R_(vb), C_(vb))−1)-th diagonals, where

${{{\sum_{{{ig}\; 3} = G_{4}}^{{\max{({R_{vb},C_{vb}})}} - 1}T_{{ig}\; 3}} = T},}\;$ −min(R_(vb), C_(vb))+1≤G₄≤max(R_(vb), C_(vb))−1, and ig3 and G₄ are integers.

It is to be noted that the above device can be, but not limited to a terminal or a network device such as a base station.

Embodiment 4

According to an embodiment of the present disclosure, a storage medium is also provided. The storage medium stores a program which, when executed, performs any of the above described methods.

According to an embodiment of the present disclosure, the above storage medium can be configured to store program codes for performing the steps of the method described above in connection with Embodiment 1.

According to an embodiment of the present disclosure, the above storage medium may include, but not limited to, a USB disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a mobile hard disk, a magnetic disk, an optical disc, or other mediums capable of storing program codes.

According to an embodiment of the present disclosure, a processor is provided. The processor is configured to execute a program for performing the steps of any of the above described methods.

According to an embodiment of the present disclosure, the above program is configured to perform the steps of the method described above in connection with Embodiment 1.

For detailed examples of this embodiment, reference can be made to those examples described in connection with the above and optional embodiments and description thereof will be omitted here.

In the following, the present disclosure will be further explained with reference to the examples, such that the present disclosure can be better understood.

Example 1

The following numerical values are provided for the purpose of illustration. For other situations, reference can be made to the following operation steps.

It is assumed that the number of columns in each of the index matrix M_(or), the index matrix M_(re), the bit sequence matrix M_(vb) and the bit sequence matrix M_(og) is fixed to be 32. The length of the first bit sequence is K=40 and the length of the bit sequence to be transmitted is T=100. Polar encoding having a mother code length of 128 is applied. In particular, the encoding process is as follows.

(1) The number R_(re) of rows of the index matrix M_(re) needs to be selected as a minimum value satisfying R_(re)×C_(re)≥N. According to the above assumptions, C_(re)=³² and N=128, then R_(re)=⁴. It is assumed that the indices in the index matrix M_(og) are arranged row by row:

$\begin{matrix} {M_{or} = \begin{bmatrix} 0 & 1 & 2 & \cdots & {C_{re} - 1} \\ C_{re} & {C_{re} + 1} & {C_{re} + 2} & \cdots & {{2C_{re}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ {\left( {R_{re} - 1} \right) \times C_{re}} & {{\left( {R_{re} - 1} \right) \times C_{re}} + 1} & {{\left( {R_{re} - 1} \right) \times C_{re}} + 2} & \cdots & {{R_{re} \times C_{re}} - 1} \end{bmatrix}} \\ {= \begin{bmatrix} 0 & 1 & 2 & \cdots & 31 \\ 32 & 33 & 34 & \cdots & 63 \\ 64 & 65 & 66 & \ddots & 95 \\ 96 & 97 & 98 & \cdots & 127 \end{bmatrix}} \end{matrix}$

(2) If the index matrix M_(re) is obtained from the index matrix M_(or) by means of column permutation, e.g., by mapping the π₁(i)-th column of the index matrix M_(or) to the i-th column of the index matrix M_(re) by means of column permutation. The indices in π₁(i) are arranged in ascending order of numerical results obtained based on a function. If the function is expressed as

${{f(i)} = {\sum_{m = 0}^{n - 1}{B_{m} \times 2^{\frac{m}{k}}}}}\;$ k=4, then {f(0), . . . , f(31)}={0, 1, 1.19, 2.19, 1.41, 2.41, 2.60, 3.60, 1.68, 2.68, 2.87, 3.87, 3.10, 4.10, 4.29, 5.29, 2.00, 3.00, 3.19, 4.19, 3.41, 4.41, 4.60, 5.60, 3.68, 4.68, 4.87, 0.87, 5.10, 6.10, 6.29, 7.29}. f(0), . . . , f(31) are arranged in ascending order to obtain a column permutation pattern π₁(i)={0, 1, 2, 4, 8, 16, 3, 5, 6, 9, 10, 17, 12, 18, 20, 7, 24, 11, 13, 19, 14, 21, 22, 25, 26, 28, 15, 23, 27, 29, 30, 31}. Accordingly, the column having an index of 0 in the index matrix M_(or) is the column having an index of 0 in the index matrix M_(re), the column having an index of 1 in the index matrix M_(or) is the column having an index of 1 in the index matrix M_(re), the column having an index of 2 in the index matrix M_(or) is the column having an index of 2 in the index matrix M_(re), the column having an index of 4 in the index matrix M_(or) is the column having an index of 3 in the index matrix M_(re), the column having an index of 8 in the index matrix M_(or) is the column having an index of 4 in the index matrix M_(re), and so on.

(3) The bit sequence matrix M_(vb) is obtained from the bit sequence matrix M_(og) by means of column permutation, e.g., by mapping the π₂(i)-th column of the bit sequence matrix M_(og) to the i-th column of the bit sequence matrix M_(vb) by means of column permutation. Here, π₂(i)=BRO(i), and the column permutation pattern is π₂(i)={0,16,8,24,4,20,12,28,2,18,10,26,6,22,14,30,1,17,9,25,5,21,13,29,3,19,11,27,7,23,15,31}. Accordingly, the column having an index of 0 in the bit sequence matrix M_(og) is the column having an index of 0 in the bit sequence matrix M_(vb), the column having an index of 16 in the bit sequence matrix M_(og) is the column having an index of 1 in the bit sequence matrix M_(vb), the column having an index of 8 in the bit sequence matrix M_(og) is the column having an index of 2 in the bit sequence matrix M_(vb), and so on.

(4) The first T=100 bits are selected from the bit sequence matrix M_(vb) column by column to form a bit sequence to be transmitted, which is {y₀, y₃₂, y₆₄, y₉₆, y₁₆, y₄₈, y₈₀, y₁₁₂, . . . , y₂₃, y₅₅, y₈₇, y₁₁₉}.

(5) K=40 indices in total are selected from the index matrix M_(re) row by row to form the index sequence M_index. It is to be noted that, during the selection of the indices, each index corresponding to a non-transmitted bit sequence is skipped. That is, the selection is made from the indices corresponding to the bit sequence to be transmitted as outputted from an encoder in the step (4).

(6) After an input bit sequence having a length of K is mapped to encoder positions indicated by the index sequence M_index, Polar encoding can be applied to obtain an encoded bit sequence having a length of N=128. The bits determined in the step (4) are organized into a bit sequence to be transmitted, for transmission from a transmitter.

Example 2

It is assumed that the number of columns in each of the index matrix M_(or), the index matrix M_(re), the bit sequence matrix M_(vb) and the bit sequence matrix M_(og) is fixed to be 32. The length of the input bit sequence is K=40 and the length of the bit sequence to be transmitted is T=100. Polar encoding having a mother code length of 128 is applied. In particular, the encoding process is different from Example 1 in that, in the step (4), the last T=100 bits are selected from the bit sequence matrix M_(vb) column by column to form the bit sequence to be transmitted, which is {y₈, y₂₄, y₄₀, y₅₆, y₇₂, y₈₈, y₁₀₄, y₁₂₀, . . . , y₁₅, y₃₁, y₄₇, y₆₃, y₇₉, y₉₅, y₁₁₁, y₁₂₇}.

Example 3

It is assumed that the number of columns in each of the index matrix M_(or), the index matrix M_(re), the bit sequence matrix M_(vb) and the bit sequence matrix M_(og) is fixed to be 32. The length of the input bit sequence is K=40 and the length of the bit sequence to be transmitted is T=150. Polar encoding having a mother code length of 128 is applied. In particular, the encoding process is different from Example 1 in that, in the step (4), T=130 bits are selected from the bit sequence matrix M_(vb) row by row, starting from the first element in the bit sequence matrix M_(vb). When the selection reaches the last bit y₁₂₇ in the buffer or in the bit sequence matrix M_(vb), it continues with the first bit y₀ of the bit sequence matrix M_(vb). The resulting bit sequent to be transmitted is {y₀, y₁, y₂, . . . , y₁₂₇, y₀, y₁, y₂}.

Example 4

It is assumed that the number of columns in each of the index matrix M_(or), the index matrix M_(re), the bit sequence matrix M_(vb) and the bit sequence matrix M_(og) is fixed to be 32. The length of the input bit sequence is K=40 and the length of the bit sequence to be transmitted is T=150. Polar encoding having a mother code length of 128 is applied. In particular, the encoding process is different from Example 3 in that, in the step (4), T=130 bits are selected from the bit sequence matrix M_(vb) row by row, starting from the last element in the bit sequence matrix M_(vb). When the selection reaches the first bit y₀ in the buffer or in the bit sequence matrix M_(vb), it continues with the last bit y₁₂₇ of the bit sequence matrix M_(vb). The resulting bit sequent to be transmitted is {y₀, y₁, y₂, . . . , y₁₂₇, y₁₂₇, y₁₂₆, y₁₂₅}.

Example 5

It is assumed that the number of columns in each of the index matrix M_(or), the index matrix M_(re), the bit sequence matrix M_(vb) and the bit sequence matrix M_(og) is fixed to be 32. The length of the input bit sequence is K=40 and the length of the bit sequence to be transmitted is T=100. Polar encoding having a mother code length of 128 is applied. In particular, the encoding process is different from Example 1 in that, the input bit sequence having the length of K=40 is mapped to the encoder positions using Gaussian approximation, density evolution, PW sequence, FRANK sequence, or other schemes. Details of the operations will be omitted here.

Example 6

It is assumed that the number of columns in each of the index matrix M_(or), the index matrix M_(re), the bit sequence matrix M_(vb) and the bit sequence matrix M_(og) is fixed to be 32. The length of the input bit sequence is K=40 and the length of the bit sequence to be transmitted is T=100. Polar encoding having a mother code length of 128 is applied. In particular, the encoding process is different from Example 2 in that, the input bit sequence having the length of K=40 is mapped to the encoder positions using Gaussian approximation, density evolution, PW sequence, FRANK sequence, or other schemes. Details of the operations will be omitted here.

Example 7

It is assumed that the number of columns in each of the index matrix M_(or), the index matrix M_(re), the bit sequence matrix M_(vb) and the bit sequence matrix M_(og) is fixed to be 32. The length of the input bit sequence is K=40 and the length of the bit sequence to be transmitted is T=130. Polar encoding having a mother code length of 128 is applied. In particular, the encoding process is different from Example 3 in that, the input bit sequence having the length of K=40 is mapped to the encoder positions using Gaussian approximation, density evolution, PW sequence, FRANK sequence, or other schemes. Details of the operations will be omitted here.

Example 8

It is assumed that the number of columns in each of the index matrix M_(or), the index matrix M_(re), the bit sequence matrix M_(vb) and the bit sequence matrix M_(og) is fixed to be 32. The length of the input bit sequence is K=40 and the length of the bit sequence to be transmitted is T=130. Polar encoding having a mother code length of 128 is applied. In particular, the encoding process is different from Example 4 in that, the input bit sequence having the length of K=40 is mapped to the encoder positions using Gaussian approximation, density evolution, PW sequence, FRANK sequence, or other schemes. Details of the operations will be omitted here.

Example 9

It is assumed that the number of columns in each of the index matrix M_(or), the index matrix M_(re), the bit sequence matrix M_(vb) and the bit sequence matrix M_(og) is fixed to be 32. The length of the input bit sequence is K=40 and the length of the bit sequence to be transmitted is T=100. Polar encoding having a mother code length of 128 is applied. In particular, the encoding process is different from Example 1 in that a different rate matching scheme is used. Details of the operations will be omitted here.

Example 10

It is assumed that the number of columns in each of the index matrix M_(or), the index matrix M_(re), the bit sequence matrix M_(vb) and the bit sequence matrix M_(og) is fixed to be 32. The length of the input bit sequence is K=40 and the length of the bit sequence to be transmitted is T=100. Polar encoding having a mother code length of 128 is applied. In particular, the encoding process is different from Example 2 in that a different rate matching scheme is used. Details of the operations will be omitted here.

Example 11

It is assumed that the number of columns in each of the index matrix M_(or), the index matrix M_(re), the bit sequence matrix M_(vb) and the bit sequence matrix M_(og) is fixed to be 32. The length of the input bit sequence is K=40 and the length of the bit sequence to be transmitted is T=130. Polar encoding having a mother code length of 128 is applied. In particular, the encoding process is different from Example 3 in that a different rate matching scheme is used. Details of the operations will be omitted here.

Example 12

It is assumed that the number of columns in each of the index matrix M_(or), the index matrix M_(re), the bit sequence matrix M_(vb) and the bit sequence matrix M_(og) is fixed to be 32. The length of the input bit sequence is K=40 and the length of the bit sequence to be transmitted is T=130. Polar encoding having a mother code length of 128 is applied. In particular, the encoding process is different from Example 4 in that a different rate matching scheme is used. Details of the operations will be omitted here.

It can be appreciated by those skilled in the art that the above-described modules or steps of the present disclosure can be implemented by a general purpose computing device, and can be centralized at one single computing device or distributed over a network of multiple computing devices. Optionally, they can be implemented by means of computer executable program codes, which can be stored in a storage device and executed by one or more computing devices. In some cases, the steps shown or described herein may be performed in an order different from the one described above. Alternatively, they can be implemented separately in individual integrated circuit modules, or one or more of the modules or steps can be implemented in one single integrated circuit module. Thus, the present disclosure is not limited to any particular hardware, software, and combination thereof.

The foregoing is merely illustrative of the examples of the present disclosure and is not intended to limit the present disclosure. Various changes and modifications may be made by those skilled in the art. Any modifications, equivalent alternatives or improvements that are made without departing from the spirits and principles of the present disclosure are to be encompassed by the scope of the present disclosure.

INDUSTRIAL APPLICABILITY

With the present disclosure, a first bit sequence having a length of K bits is mapped to a specified position based on M_index to obtain a second bit sequence. Polar encoding is applied to the second bit sequence to obtain a Polar encoded bit sequence. T bits are selected based on the Polar encoded bit sequence as a bit sequence to be transmitted. That is, the present disclosure provides a method for determining a bit sequence to be transmitted, capable of solving the problem in the related art associated with lack of a sequence determination scheme in the 5G New RAT. 

What is claimed is:
 1. A method for channel coding, comprising: mapping a first bit sequence having a length of K bits to a second bit sequence based on an index indicating a first permutation pattern; applying Polar encoding to the second bit sequence to obtain a Polar encoded bit sequence; forming a first matrix based on the Polar encoded bit sequence; determining a second matrix by applying a second permutation pattern to the first matrix; and selecting T bits based on the second matrix, where K and T are both non-negative integers.
 2. The method of claim 1, wherein the first matrix is M_(og), and $M_{og} = {\begin{bmatrix} x_{0} & x_{1} & x_{2} & \cdots & x_{C_{vb} - 1} \\ x_{C_{vb}} & x_{C_{vb} + 1} & x_{C_{vb} + 2} & \cdots & x_{{2C_{vb}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{{({R_{vb} - 1})} \times C_{vb}} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 1} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 2} & \cdots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}\mspace{14mu}{or}}$ ${M_{og} = \begin{bmatrix} x_{0} & x_{R_{vb}} & x_{2R_{vb}} & \cdots & x_{{({C_{vb} - 1})} \times R_{vb}} \\ x_{1} & x_{R_{vb} + 1} & x_{{2R_{vb}} + 1} & \cdots & x_{{{({C_{vb} - 1})} \times R_{vb}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{R_{vb} - 1} & x_{{2R_{vb}} - 1} & x_{{3R_{vb}} - 1} & \cdots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}},$ where x₀, x₁, x₂, . . . , x_(R) _(vb) _(×C) _(vb) ⁻¹ is the Polar encoded bit sequence, R_(vb) and C_(vb) being both non-negative integers.
 3. The method of claim 1, wherein the second premutation pattern comprises a row or a column being same as a predefined sequence V2 in all positions, where V2={0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31}.
 4. The method of claim 1, wherein said selecting T bits based on the second matrix comprises: selecting T bits column by column from the second matrix.
 5. The method of claim 1, wherein said selecting T bits based on the second matrix comprises: performing a selection of T bits from a starting position tin the second matrix, wherein the selection continues with a first bit in the second matrix upon reaching a last bit in the second matrix, where 1≤t.
 6. The method of claim 1, wherein the first matrix comprises 32 columns.
 7. A device for channel coding, comprising: a processor; and a memory including processor executable code, wherein the processor executable code upon execution by the processor configures the processor to: map a first bit sequence having a length of K bits to a second bit sequence based on an index indicating a first permutation pattern; apply Polar encoding to the second bit sequence to obtain a Polar encoded bit sequence; form a first matrix based on the Polar encoded bit sequence; determine a second matrix by applying a second permutation pattern to the first matrix; and select T bits based on the second matrix, where K and T are both non-negative integers.
 8. The device of claim 7, wherein the first matrix is M_(og), and $M_{og} = {\begin{bmatrix} x_{0} & x_{1} & x_{2} & \cdots & x_{C_{vb} - 1} \\ x_{C_{vb}} & x_{C_{vb} + 1} & x_{C_{vb} + 2} & \cdots & x_{{2C_{vb}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{{({R_{vb} - 1})} \times C_{vb}} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 1} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 2} & \cdots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}\mspace{14mu}{or}}$ ${M_{og} = \begin{bmatrix} x_{0} & x_{R_{vb}} & x_{2R_{vb}} & \cdots & x_{{({C_{vb} - 1})} \times R_{vb}} \\ x_{1} & x_{R_{vb} + 1} & x_{{2R_{vb}} + 1} & \cdots & x_{{{({C_{vb} - 1})} \times R_{vb}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{R_{vb} - 1} & x_{{2R_{vb}} - 1} & x_{{3R_{vb}} - 1} & \cdots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}},$ where x₀, x₁, x₂, . . . , x_(R) _(vb) _(×C) _(vb) ⁻¹ is the Polar encoded bit sequence, R_(vb) and C_(vb) being both non-negative integers.
 9. The device of claim 7, wherein the second premutation pattern comprises a row or a column being same as a predefined sequence V2 in all positions, where V2={0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31}.
 10. The device of claim 7, wherein the processor executable code upon execution by the processor configures the processor to select T bits column by column from the second matrix.
 11. The device of claim 7, wherein the processor executable code upon execution by the processor configures the processor to perform a selection of T bits from a starting position t in the second matrix, wherein the selection continues with a first bit in the second matrix upon reaching a last bit in the second matrix, wherein t>=1.
 12. The device of claim 7, wherein the first matrix comprises 32 columns.
 13. A non-transitory storage medium having code stored thereon, the code upon execution by a processor, causing the processor to implement a method that comprises: mapping a first bit sequence having a length of K bits to a second bit sequence based on an index indicating a first permutation pattern; applying Polar encoding to the second bit sequence to obtain a Polar encoded bit sequence; forming a first matrix based on the Polar encoded bit sequence; determining a second matrix by applying a second permutation pattern to the first matrix; selecting T bits based on the second matrix, where K and T are both non-negative integers.
 14. The non-transitory storage medium of claim 13, wherein the first matrix is M_(og), and $M_{og} = {\begin{bmatrix} x_{0} & x_{1} & x_{2} & \cdots & x_{C_{vb} - 1} \\ x_{C_{vb}} & x_{C_{vb} + 1} & x_{C_{vb} + 2} & \cdots & x_{{2C_{vb}} - 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{{({R_{vb} - 1})} \times C_{vb}} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 1} & x_{{{({R_{vb} - 1})} \times C_{vb}} + 2} & \cdots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}\mspace{14mu}{or}}$ ${M_{og} = \begin{bmatrix} x_{0} & x_{R_{vb}} & x_{2R_{vb}} & \cdots & x_{{({C_{vb} - 1})} \times R_{vb}} \\ x_{1} & x_{R_{vb} + 1} & x_{{2R_{vb}} + 1} & \cdots & x_{{{({C_{vb} - 1})} \times R_{vb}} + 1} \\ \vdots & \vdots & \vdots & \ddots & \vdots \\ x_{R_{vb} - 1} & x_{{2R_{vb}} - 1} & x_{{3R_{vb}} - 1} & \cdots & x_{{R_{vb} \times C_{vb}} - 1} \end{bmatrix}},$ where x₀, x₁, x₂, . . . , x_(R) _(vb) _(×C) _(vb) ⁻¹ is the Polar encoded bit sequence, R_(vb) and C_(vb) being both non-negative integers.
 15. The non-transitory storage medium of claim 13, wherein the second premutation pattern comprises a row or a column being same as a predefined sequence V2 in all positions, where V2={0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31}.
 16. The non-transitory storage medium of claim 13, wherein said selecting T bits based on the second matrix: selecting T bits column by column from the second matrix.
 17. The non-transitory storage medium of claim 13, wherein the method further comprises: performing a selection of T bits from a starting position tin the second matrix, wherein the selection continues with a first bit in the second matrix upon reaching a last bit in the second matrix, wherein t>=1.
 18. The non-transitory storage medium of claim 13, wherein the first matrix comprises 32 columns. 